Microelectronic component and assembly having leads with offset portions

Abstract

A microelectronic component comprising a dielectric layer having an opening and leads extending across the opening is disclosed. The leads have an offset portion. A method of making a microelectronic assembly comprises connecting each of the leads to a contact on a microelectronic element. A semiconductor chip assembly has a microelectronic component with an opening and leads extending across the opening. The leads are connected to contacts on a semiconductor chip and have at least one twisted portion.

1 . (canceled)  
     
     
         2 . A unit comprising: 
 (a) a semiconductor chip having a front surface with contacts thereon and a rear surface;    (b) a plurality of terminals, at least some of said terminals being electrically connected to at least some of said contacts and overlying a surface of said chip;    (c) a dielectric material overlying said chip and having holes extending through it such that said terminals are exposed through said holes; and    (d) masses of electrically conductive bonding material disposed in said holes in contact with said terminals.    
     
     
         3 . A unit as claimed in  claim 2  wherein said holes in said dielectric material are devoid of electrically conductive material other than said bonding material.  
     
     
         4 . A unit as claimed in  claim 2  wherein said dielectric material is polymeric material.  
     
     
         5 . A unit as claimed in  claim 2  wherein said holes are formed by selectively applying radiant energy to said dielectric material so as to remove portions of said dielectric material.  
     
     
         6 . A unit as claimed in  claim 2  wherein said holes are formed by selectively applying radiant energy to said dielectric material so as to selectively cure the dielectric material, and then removing uncured dielectric material.  
     
     
         7 . A unit as claimed in  claim 2  wherein said holes are formed by mechanically punching said dielectric material.  
     
     
         8 . A unit as claimed in  claim 2  wherein said terminals are flat.  
     
     
         9 . A unit as claimed in  claim 2  further comprising electrically conductive lead portions, said at least some of said terminals being electrically connected to said contacts through said lead portions.  
     
     
         10 . A unit as claimed in  claim 9 . wherein said lead portions are formed integrally with said terminals.  
     
     
         11 . A unit as claimed in  claim 10  wherein said at least some of said terminals overlie said front surface of said chip.  
     
     
         12 . A unit as claimed in  claim 9  wherein said lead portions are attached to said contacts.  
     
     
         13 . A unit as claimed in  claim 9  further comprising wire bonds connecting said lead portions to said contacts.  
     
     
         14 . A unit as claimed in  claim 2  wherein said bonding material is a solder.  
     
     
         15 . A unit as claimed in  claim 2  wherein said bonding material abuts said dielectric material.  
     
     
         16 . An assembly comprising a unit as claimed in  claim 2  and a circuit panel having contact pads thereon, said bonding material connecting said terminals to said contact pads.  
     
     
         17 . An assembly as claimed in  claim 16  wherein said bonding material projects beyond said dielectric material to said contact pads.  
     
     
         18 . A unit comprising: 
 (a) a semiconductor chip having a front surface with contacts thereon and a rear surface;    (b) a first dielectric layer having a plurality of electrically conductive terminals, at least some of said terminals being electrically connected to at least some of said contacts and overlying a surface of said chip;    (c) a dielectric material overlying said terminals and having holes extending through it in alignment with said terminals; and    (d) masses of electrically conductive bonding material disposed in said holes in contact with said terminals.    
     
     
         19 . A unit as claimed in  claim 18  wherein said holes in said dielectric material are devoid of electrically conductive material other than said bonding material.  
     
     
         20 . A unit as claimed in  claim 19  wherein said dielectric material is in the form of a second dielectric layer.  
     
     
         21 . A unit as claimed in  claim 18  wherein said first dielectric layer has a first surface facing toward said chip and a second surface facing away from said chip and said terminals are disposed on said second surface of said first dielectric layer.  
     
     
         22 . A unit as claimed in  claim 21  wherein said terminals are formed by etching a metallic sheet disposed on said second surface of said first dielectric layer.  
     
     
         23 . A unit as claimed in  claim 18  wherein said dielectric material is polymeric material.  
     
     
         24 . A unit as claimed in  claim 18  wherein said holes are formed by selectively applying radiant energy to said dielectric material so as to remove portions of said dielectric material.  
     
     
         25 . A unit as claimed in  claim 18  wherein said holes are formed by selectively applying radiant energy to said dielectric material so as to selectively cure the dielectric material, and then removing uncured dielectric material.  
     
     
         26 . A unit as claimed in  claim 18  wherein said holes are formed by mechanically punching said dielectric material.  
     
     
         27 . A unit as claimed in  claim 18  wherein said terminals are flat.  
     
     
         28 . A unit as claimed in  claim 18  further comprising electrically conductive lead portions extending along said first dielectric layer, said at least some of said terminals being electrically connected to said contacts through said lead portions.  
     
     
         29 . A unit as claimed in  claim 28  wherein said lead portions are formed integrally with said terminals.  
     
     
         30 . A unit as claimed in  claim 28 , wherein said first dielectric layer overlies said front surface of said chip.  
     
     
         31 . A unit as claimed in  claim 30 , wherein said lead portions are attached to said contacts.  
     
     
         32 . A unit as claimed in  claim 28  wherein said first dielectric layer overlies said rear surface of said chip.  
     
     
         33 . A unit as claimed in  claim 32  further comprising wire bonds connecting said lead portions to said contacts.  
     
     
         34 . A unit as claimed in  claim 18  wherein said bonding material is a solder.  
     
     
         35 . A unit as claimed in  claim 18  wherein said bonding material abuts said dielectric material.  
     
     
         36 . An assembly comprising a unit as claimed in  claim 18  and a circuit panel having contact pads thereon, said bonding material connecting said terminals to said contact pads.  
     
     
         37 . An assembly as claimed in  claim 36  wherein said bonding material projects beyond said dielectric material to said contact pads.  
     
     
         38 . A unit comprising: 
 (a) a semiconductor chip having a front surface with contacts thereon and a rear surface;    (b) a first dielectric material overlying said chip;    (c) a plurality of terminals, at least some of said terminals being electrically connected to at least some of said chip contacts and overlying the first dielectric material;    (d) a second dielectric material overlying said chip and having holes extending through it such that said terminals are exposed through said holes; and    (e) masses of electrically conductive bonding material in electrical contact with said terminals and disposed in and protruding out of said holes.    
     
     
         39 . A unit as claimed in  claim 38  wherein said first dielectric material is in the form of a first dielectric layer.  
     
     
         40 . A unit as claimed in  claim 39  further comprising electrically conductive lead portions extending along a surface of said first dielectric layer, said at least some of said terminals being electrically connected to said at least some of said contacts through said lead portions.  
     
     
         41 . A unit as claimed in  claim 39  wherein said second dielectric material is in the form of a second dielectric layer overlying said first dielectric layer.  
     
     
         42 . A unit as claimed in  claim 38  further comprising electrically conductive lead portions, said at least some of said terminals being electrically connected to said contacts through said lead portions.  
     
     
         43 . A unit as claimed in  claim 42  wherein said lead portions are formed integrally with said terminals.  
     
     
         44 . An assembly comprising a unit as claimed in  claim 38  and a circuit panel having contact pads thereon, said bonding material connecting said terminals to said contact pads.