Semiconductor device with silicon-germanium gate electrode and method for manufacturing thereof

Abstract

A SiO 2 film serving as a gate dielectric film is formed on a silicon substrate. A seed Si film is formed on the gate dielectric film. A thin SiGe film of a thickness of 50 nm or less is formed on the seed Si film at a temperature between 450° C. and 494° C., and a thin cap Si film of a thickness of 0.5 nm to 5 nm is continuously formed on the thin SiGe film at the same temperature.

1 . A semiconductor device comprising: 
 a gate dielectric film on a substrate; and    a gate electrode on the gate dielectric film, having: 
 a seed Si film on the gate dielectric film;  
 an SiGe film on the seed Si film and having a thickness not exceeding 50 nm; and  
 a cap Si film on the thin SiGe film and having a thickness in a range from 0.5 nm to 5 nm.  
   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the cap Si film lowers surface energy of the SiGe film.  
     
     
         3 . The semiconductor device according to  claim 1 , wherein the gate electrode further includes an upper Si film on the cap Si film.  
     
     
         4 . The semiconductor device according to  claim 1 , wherein the gate electrode further has an upper Si film on the cap Si film and a silicide layer in an upper portion of the upper Si film.  
     
     
         5 . The semiconductor device according to  claim 1 , wherein the SiGe film includes a plurality of laminated SiGe layers.  
     
     
         6 . The semiconductor device according to  claim 5 , wherein the plurality of SiGe layers differ in proportion of Ge content.  
     
     
         7 . The semiconductor device according to  claim 1 , wherein the gate electrode has a plurality of SiGe layers and a plurality of cap Si films, and the SiGe layers and cap Si films are stacked alternately.  
     
     
         8 . The semiconductor device according to  claim 1 , wherein proportion of Ge content of the SiGe film is in a range from 0.15 to less than 0.4.  
     
     
         9 . A method for manufacturing a semiconductor device, comprising: 
 forming a gate dielectric film on a substrate;    forming a seed Si film on the gate dielectric film;    forming a SiGe film on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a cap Si film with a thickness of 0.5 nm to 5 nm on the SiGe film at the same temperature at which the SiGe film is formed;    patterning the cap Si film, the SiGe film, and the seed Si film to form a gate electrode; and    forming source-drain regions the substrate by ion implantation using the gate electrode as a mask.    
     
     
         10 . The method for manufacturing a semiconductor device according to  claim 9 , wherein surface energy of the SiGe film is lowered by forming the cap Si film.  
     
     
         11 . The method for manufacturing a semiconductor device according to  claim 9 , including forming the SiGe film at a pressure lower than 30 Pa, or 150 Pa or higher.  
     
     
         12 . A method for manufacturing a semiconductor device, comprising: 
 forming a gate dielectric film on a substrate;    forming a seed Si film on the gate dielectric film;    forming a SiGe film on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a cap Si film with a thickness of 0.5 nm to 5 nm on the SiGe film at the same temperature at which the SiGe film is formed;    forming an upper Si film on the cap Si film at a temperature higher than the temperature of forming the SiGe film;    patterning the upper Si film, the cap Si film, the SiGe film, and the seed Si film to form a gate electrode; and    forming source-drain regions in the substrate by ion implantation using the gate electrode as a mask.    
     
     
         13 . The method for manufacturing a semiconductor device according to  claim 12 , including forming the upper Si film at a temperature between 530° C. and 620° C.  
     
     
         14 . The method for manufacturing a semiconductor device according to  claim 12 , wherein surface energy of the thin SiGe film is lowered by forming the thin cap Si film.  
     
     
         15 . The method for manufacturing a semiconductor device according to  claim 12 , including forming the SiGe film at a pressure lower than 30 Pa, or 150 Pa or higher.  
     
     
         16 . The method for manufacturing a semiconductor device according to  claim 12 , wherein forming the SiGe film comprises: 
 forming a first SiGe layer on the seed Si film; and    forming a second SiGe layer on the first SiGe layer, the second SiGe layer being different in composition from the first SiGe layer.    
     
     
         17 . The method for manufacturing a semiconductor device according to  claim 16 , wherein the proportion of Ge content of each of the first and second SiGe layers is different.  
     
     
         18 . A method for manufacturing a semiconductor device, comprising: 
 forming a gate dielectric film on a substrate;    forming a seed Si film on the gate dielectric film;    forming a SiGe film on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a cap Si film with a thickness of 0.5 nm to 5 nm on the SiGe film at the same temperature at which the SiGe film is formed;    forming an upper Si film on the cap Si film at a temperature higher than the temperature at which the SiGe film is formed;    patterning the upper Si film, the cap Si film, the SiGe film, and the seed Si film to form a gate electrode;    forming extension regions in an upper layer of the substrate by ion implantation, using the gate electrode as a mask;    forming sidewalls covering sides of the gate electrode after forming the extension regions;    forming source and drain regions in the substrate by ion implantation, using the gate electrode and the sidewalls as a mask; and    forming suicide layers in upper portions of the upper Si film and the source and drain regions using a saliciding technique.    
     
     
         19 . A method for manufacturing a semiconductor device, comprising: 
 forming a gate dielectric film on a substrate;    forming a seed Si film on the gate dielectric film;    forming a first SiGe layer on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a first cap Si film with a thickness of 0.5 nm to 5 nm on the first SiGe layer at the same temperature at which the first SiGe layer is formed, and continuously forming a second SiGe layer on the first cap Si layer at the same temperature at which the first SiGe layer is formed, and continuously forming a second cap Si film with a thickness of 0.5 nm to 5 nm on the second SiGe layer at the same temperature at which the first SiGe layer is formed;    patterning the second cap Si film, the second SiGe layer, the first cap Si film, the first SiGe layer, and the seed Si film to form a gate electrode; and    forming source and drain regions in the substrate by ion implantation, using the gate electrode as a mask.    
     
     
         20 . A method for manufacturing a semiconductor device, comprising: 
 forming a gate dielectric film on a substrate;    forming a seed Si film on the gate dielectric film;    forming a first SiGe layer on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a first cap Si film with a thickness of 0.5 nm to 5 nm on the first SiGe layer at the same temperature at which the first SiGe layer is formed, and continuously forming a second SiGe layer on the first cap Si layer at the same temperature at which the first SiGe layer is formed, and continuously forming a second cap Si film with a thickness of 0.5 nm to 5 nm on the second SiGe layer at the same temperature at which the first SiGe layer is formed;    forming an upper Si film on the second cap Si film at a temperature higher than the temperature at which the first SiGe layer is formed;    patterning the upper Si film, the second cap Si film, the second SiGe layer, the first cap Si film, the first SiGe layer, and the seed Si film to form a gate electrode;    forming extension regions in the substrate by ion implantation, using the gate electrode as a mask;    forming sidewalls covering sides of the gate electrode after forming the extension regions;    forming source and drain regions in the substrate by ion implantation, using the gate electrode and the sidewalls as a mask; and    forming silicide layers in upper portions of the upper Si film and the source and drain regions using a saliciding technique.