Inventor · disambiguated record
Edward Aung
Also filed as: AUNG EDWARD · AUNG EDWARD P
9 granted patents·1 pending application·288 citations·filing 1999–2016
91Inventor score
Files withALTERA CORP10
Top patents by PatentIndex Score
10 records- 0192US6469553B1Phase-locked loop circuitry for programmable logic devicesALTERA CORP·Filed 2001·Granted Oct 22, 2002·69 cites·29 claims
- 0291US6218876B1Phase-locked loop circuitry for programmable logic devicesALTERA CORP·Filed 1999·Granted Apr 17, 2001·72 cites·5 claims
- 0388US7227918B2Clock data recovery circuitry associated with programmable logic device circuitryALTERA CORP·Filed 2001·Granted Jun 5, 2007·62 cites·138 claims
- 0482US7684532B2Clock data recovery circuitry associated with programmable logic device circuitryALTERA CORP·Filed 2007·Granted Mar 23, 2010·9 cites·22 claims
- 0580US7242229B1Phase locked loop (PLL) and delay locked loop (DLL) counter and delay element programming in user modeALTERA CORP·Filed 2002·Granted Jul 10, 2007·26 cites·104 claims
- 0673US7333570B2Clock data recovery circuitry associated with programmable logic device circuitryALTERA CORP·Filed 2003·Granted Feb 19, 2008·17 cites·17 claims
- 0773US6891401B2Clock loss detection and switchover circuitALTERA CORP·Filed 2002·Granted May 10, 2005·14 cites·31 claims
- 0870US7046048B2Clock loss detection and switchover circuitALTERA CORP·Filed 2004·Granted May 16, 2006·13 cites·16 claims
- 0969US7427881B2Clock loss detection and switchover circuitALTERA CORP·Filed 2006·Granted Sep 23, 2008·6 cites·24 claims
- 1044US2017155529A1Clock Data Recovery Circuitry Associated With Programmable Logic Device CircuitryALTERA CORP·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →