Inventor · disambiguated record
Louis Bernard Bushard
Also filed as: BUSHARD LOUIS B · BUSHARD LOUIS BERNARD
17 granted patents·3 pending applications·262 citations·filing 1983–2009
93Inventor score
Top patents by PatentIndex Score
20 records- 0191US4873630AScientific processor to support a host processor referencing common memoryUNISYS CORP·Filed 1985·Granted Oct 10, 1989·153 cites·26 claims
- 0279US7055077B2Systems and methods for circuit testingTOSHIBA KK·Filed 2003·Granted May 30, 2006·23 cites·23 claims
- 0374US7844869B2Implementing enhanced LBIST testing of paths including arraysIBM·Filed 2008·Granted Nov 30, 2010·7 cites·19 claims
- 0471US7489572B2Method for implementing eFuse sense amplifier testing without blowing the eFuseIBM·Filed 2007·Granted Feb 10, 2009·6 cites·11 claims
- 0564US8117579B2LSSD compatibility for GSD unified global clock buffersWARNOCK JAMES DOUGLAS·Filed 2008·Granted Feb 14, 2012·6 cites·13 claims
- 0661US7689950B2Implementing Efuse sense amplifier testing without blowing the EfuseIBM·Filed 2007·Granted Mar 30, 2010·3 cites·12 claims
- 0755US4594680AApparatus for performing quadratic convergence division in a large data processing systemSPERRY CORP·Filed 1983·Granted Jun 10, 1986·22 cites·11 claims
- 0853US5819072AMethod of using a four-state simulator for testing integrated circuit designs having variable timing constraintsUNISYS CORP·Filed 1996·Granted Oct 6, 1998·29 cites·17 claims
- 0952US7797600B2Method and apparatus for testing a ring of non-scan latches with logic built-in self-testIBM·Filed 2008·Granted Sep 14, 2010·1 cites·14 claims
- 1052US7406640B2Method and apparatus for testing a ring of non-scan latches with logic built-in self-testIBM·Filed 2006·Granted Jul 29, 2008·1 cites·6 claims
- 1149US7733722B2Apparatus for implementing eFuse sense amplifier testing without blowing the eFuseIBM·Filed 2009·Granted Jun 8, 2010·1 cites·9 claims
- 1244US7318182B2Memory array manufacturing defect detection system and methodIBM·Filed 2004·Granted Jan 8, 2008·4 cites·11 claims
- 1343US6590382B2Signal pin tester for AC defects in integrated circuitsIBM·Filed 2000·Granted Jul 8, 2003·2 cites·2 claims
- 1442US7080298B2Circuit apparatus and method for testing integrated circuits using weighted pseudo-random test patternsIBM·Filed 2003·Granted Jul 18, 2006·2 cites·11 claims
- 1540US2005172187A1Signal pin tester for AC defects in integrated circuitsFiled 2005·Application pending·0 cites
- 1639US2009063921A1Staggered LBIST Clock Sequence for Noise (di/dt) AmeliorationAIPPERSPACH ANTHONY GUS·Filed 2007·Application pending·0 cites
- 1737US6909274B2Signal pin tester for AC defects in integrated circuitsIBM·Filed 2003·Granted Jun 21, 2005·0 cites·2 claims
- 1836US2007168809A1Systems and methods for LBIST testing using commonly controlled LBIST satellitesKIRYU NAOKI·Filed 2005·Application pending·0 cites
- 1933US7562267B2Methods and apparatus for testing a memoryIBM·Filed 2004·Granted Jul 14, 2009·0 cites·50 claims
- 2029US4736292AElectronic data processing system overlaid jump mechanismUNISYS CORP·Filed 1985·Granted Apr 5, 1988·2 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →