Inventor · disambiguated record
Yann Mignot
Also filed as: MIGNOT YANN · MIGNOT YANN A · MIGNOT YANN A M · MIGNOT Yann Alain Marcel
123 granted patents·11 pending applications·365 citations·filing 2013–2023
99Inventor score
Files withIBM116ST MICROELECTRONICS INC10GLOBALFOUNDRIES INC2TESSERA INC2ADEIA SEMICONDUCTOR SOLUTIONS LLC1
Top patents by PatentIndex Score
134 records- 0198US10020254B1Integration of super via structure in BEOLIBM·Filed 2017·Granted Jul 10, 2018·39 cites·8 claims
- 0298US10020255B1Integration of super via structure in BEOLIBM·Filed 2017·Granted Jul 10, 2018·36 cites·12 claims
- 0397US10304744B1Inverse tone direct print EUV lithography enabled by selective material depositionIBM·Filed 2018·Granted May 28, 2019·23 cites·14 claims
- 0496US10658180B1EUV pattern transfer with ion implantation and reduced impact of resist residueIBM·Filed 2018·Granted May 19, 2020·6 cites·18 claims
- 0596US10361129B1Self-aligned double patterning formed fincutIBM·Filed 2018·Granted Jul 23, 2019·14 cites·18 claims
- 0696US9779944B1Method and structure for cut material selectionIBM·Filed 2016·Granted Oct 3, 2017·17 cites·19 claims
- 0796US9373582B1Self aligned via in integrated circuitIBM·Filed 2015·Granted Jun 21, 2016·18 cites·8 claims
- 0895US12010930B2Wrap-around projection liner for AI deviceIBM·Filed 2021·Granted Jun 11, 2024·2 cites·20 claims
- 0995US8927442B1SiCOH hardmask with graded transition layersIBM·Filed 2013·Granted Jan 6, 2015·33 cites·10 claims
- 1094US10157789B2Via formation using sidewall image transfer process to define lateral dimensionIBM·Filed 2016·Granted Dec 18, 2018·12 cites·11 claims
- 1194US10103022B2Alternating hardmasks for tight-pitch line formationIBM·Filed 2017·Granted Oct 16, 2018·8 cites·20 claims
- 1294US9984919B1Inverted damascene interconnect structuresGLOBALFOUNDRIES INC·Filed 2017·Granted May 29, 2018·11 cites·17 claims
- 1394US9385078B1Self aligned via in integrated circuitIBM·Filed 2016·Granted Jul 5, 2016·11 cites·1 claims
- 1493US12094774B2Back-end-of-line single damascene top via spacer defined by pillar mandrelsIBM·Filed 2021·Granted Sep 17, 2024·2 cites·8 claims
- 1593US10622301B2Method of forming a straight via profile with precise critical dimension controlIBM·Filed 2018·Granted Apr 14, 2020·8 cites·15 claims
- 1693US9490168B1Via formation using sidewall image transfer process to define lateral dimensionIBM·Filed 2015·Granted Nov 8, 2016·10 cites·9 claims
- 1792US10586732B2Via cleaning to reduce resistanceIBM·Filed 2016·Granted Mar 10, 2020·7 cites·19 claims
- 1892US9679899B2Co-integration of tensile silicon and compressive silicon germaniumST MICROELECTRONICS INC·Filed 2015·Granted Jun 13, 2017·5 cites·20 claims
- 1991US10410875B2Alternating hardmasks for tight-pitch line formationIBM·Filed 2017·Granted Sep 10, 2019·4 cites·20 claims
- 2091US10276434B1Structure and method using metal spacer for insertion of variable wide line implantation in SADP/SAQP integrationIBM·Filed 2018·Granted Apr 30, 2019·6 cites·20 claims
- 2190US10361125B2Methods and structures for forming uniform fins when using hardmask patternsIBM·Filed 2017·Granted Jul 23, 2019·4 cites·13 claims
- 2290US10032632B2Selective gas etching for self-aligned pattern transferIBM·Filed 2016·Granted Jul 24, 2018·4 cites·19 claims
- 2389US11056426B2Metallization interconnect structure formationIBM·Filed 2019·Granted Jul 6, 2021·6 cites·20 claims
- 2489US9390967B2Method for residue-free block pattern transfer onto metal interconnects for air gap formationIBM·Filed 2014·Granted Jul 12, 2016·9 cites·19 claims
- 2587US11600325B2Non volatile resistive memory logic deviceIBM·Filed 2020·Granted Mar 7, 2023·2 cites·19 claims
- 2686US10032633B1Image transfer using EUV lithographic structure and double patterning processIBM·Filed 2017·Granted Jul 24, 2018·3 cites·4 claims
- 2785US11670580B2Subtractive via etch for MIMCAPIBM·Filed 2021·Granted Jun 6, 2023·1 cites·17 claims
- 2885US10903111B2Semiconductor device with linerless contactsIBM·Filed 2019·Granted Jan 26, 2021·4 cites·11 claims
- 2985US10672705B2Method of forming a straight via profile with precise critical dimension controlIBM·Filed 2019·Granted Jun 2, 2020·3 cites·16 claims
- 3085US10607922B1Controlling via critical dimension during fabrication of a semiconductor waferIBM·Filed 2018·Granted Mar 31, 2020·3 cites·14 claims
- 3185US9508560B1SiARC removal with plasma etch and fluorinated wet chemical solution combinationIBM·Filed 2015·Granted Nov 29, 2016·4 cites·20 claims
- 3285US9466563B2Interconnect structure for an integrated circuit and method of fabricating an interconnect structureST MICROELECTRONICS INC·Filed 2014·Granted Oct 11, 2016·7 cites·18 claims
- 3384US9837351B1Avoiding gate metal via shorting to source or drain contactsIBM·Filed 2016·Granted Dec 5, 2017·3 cites·16 claims
- 3482US11164778B2Barrier-free vertical interconnect structureIBM·Filed 2019·Granted Nov 2, 2021·3 cites·6 claims
- 3582US11152298B2Metal via structureIBM·Filed 2019·Granted Oct 19, 2021·3 cites·18 claims
- 3681US11239077B2Litho-etch-litho-etch with self-aligned blocksIBM·Filed 2019·Granted Feb 1, 2022·2 cites·20 claims
- 3781US10886197B2Controlling via critical dimension with a titanium nitride hard maskIBM·Filed 2020·Granted Jan 5, 2021·1 cites·19 claims
- 3880US9214429B2Trench interconnect having reduced fringe capacitanceST MICROELECTRONICS INC·Filed 2013·Granted Dec 15, 2015·5 cites·20 claims
- 3979US12488986B2Selective gas etching for self-aligned pattern transferADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2022·Granted Dec 2, 2025·0 cites·10 claims
- 4079US10615027B1Stack viabar structuresIBM·Filed 2018·Granted Apr 7, 2020·2 cites·20 claims
- 4179US10354927B2Co-integration of tensile silicon and compressive silicon germaniumST MICROELECTRONICS INC·Filed 2018·Granted Jul 16, 2019·1 cites·25 claims
- 4278US10937653B2Multiple patterning scheme integration with planarized cut patterningIBM·Filed 2019·Granted Mar 2, 2021·1 cites·19 claims
- 4378US10312103B2Alternating hardmasks for tight-pitch line formationIBM·Filed 2017·Granted Jun 4, 2019·1 cites·15 claims
- 4477US11037822B2Svia using a single damascene interconnectIBM·Filed 2019·Granted Jun 15, 2021·2 cites·16 claims
- 4577US9916986B2Single or mutli block mask management for spacer height and defect reduction for BEOLIBM·Filed 2016·Granted Mar 13, 2018·2 cites·20 claims
- 4676US11302533B2Selective gas etching for self-aligned pattern transferTESSERA INC·Filed 2021·Granted Apr 12, 2022·0 cites·20 claims
- 4776US11131919B2Extreme ultraviolet (EUV) mask stack processingIBM·Filed 2018·Granted Sep 28, 2021·1 cites·15 claims
- 4876US11101175B2Tall trenches for via chamferless and self forming barrierIBM·Filed 2018·Granted Aug 24, 2021·2 cites·17 claims
- 4976US10825726B2Metal spacer self aligned multi-patterning integrationIBM·Filed 2018·Granted Nov 3, 2020·2 cites·7 claims
- 5076US9859426B1Semiconductor device including optimized elastic strain bufferIBM·Filed 2016·Granted Jan 2, 2018·2 cites·16 claims
Showing the top 50 of 134 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →