Inventor · disambiguated record
Yung Kuan Hsiao
Also filed as: HSIAO YUNG KUAN
19 granted patents·2 pending applications·238 citations·filing 1997–2023
94Inventor score
Files withTAIWAN SEMICONDUCTOR MFG8JCET SEMICONDUCTOR SHAOXING CO LTD3PHUA YOKE HOR2STATS CHIPPAC LTD2CHEN KANG1
Top patents by PatentIndex Score
21 records- 0185US7446398B2Bump pattern design for flip chip semiconductor packageTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Nov 4, 2008·15 cites·18 claims
- 0284US8421212B2Integrated circuit packaging system with active surface heat removal and method of manufacture thereofCHEN KANG·Filed 2010·Granted Apr 16, 2013·8 cites·18 claims
- 0384US5985765AMethod for reducing bonding pad loss using a capping layer when etching bonding pad passivation openingsTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Nov 16, 1999·78 cites·20 claims
- 0482US8524577B2Semiconductor device and method of forming reconstituted wafer with larger carrier to achieve more eWLB packages per wafer with encapsulant deposited under temperature and pressurePHUA YOKE HOR·Filed 2012·Granted Sep 3, 2013·7 cites·22 claims
- 0582US8455991B2Integrated circuit packaging system with warpage control and method of manufacture thereofHSIAO YUNG KUAN·Filed 2010·Granted Jun 4, 2013·10 cites·14 claims
- 0681US6004857AMethod to increase DRAM capacitor via rough surface storage node plateTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Dec 21, 1999·51 cites·24 claims
- 0768US12148677B2Semiconductor device and method of forming ultra high density embedded semiconductor die packageJCET SEMICONDUCTOR SHAOXING CO LTD·Filed 2021·Granted Nov 19, 2024·0 cites·20 claims
- 0866US8766426B2Integrated circuit packaging system with warpage control and method of manufacture thereofGOH HIN HWA·Filed 2010·Granted Jul 1, 2014·3 cites·18 claims
- 0965US9824923B2Semiconductor device and method of forming conductive pillar having an expanded baseSHARIFF DZAFIR·Filed 2012·Granted Nov 21, 2017·4 cites·18 claims
- 1061US9627338B2Semiconductor device and method of forming ultra high density embedded semiconductor die packageSTATS CHIPPAC LTD·Filed 2014·Granted Apr 18, 2017·1 cites·24 claims
- 1155US6444584B1Plasma etch method for forming composite silicon/dielectric/silicon stack layerTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Sep 3, 2002·21 cites·15 claims
- 1255US2025087545A1Semiconductor Device and Method of Forming FOWLP with Pre-Molded Embedded Discrete Electrical ComponentSTATS CHIPPAC PTE LTD·Filed 2023·Application pending·0 cites
- 1350US11227809B2Semiconductor device and method of forming ultra high density embedded semiconductor die packageJCET SEMICONDUCTOR SHAOXING CO LTD·Filed 2017·Granted Jan 18, 2022·0 cites·25 claims
- 1450US6140218AMethod for fabricating a T-shaped hard mask/conductor profile to improve self-aligned contact isolationTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Oct 31, 2000·12 cites·14 claims
- 1549US10916482B2Semiconductor device and method of forming reconstituted wafer with larger carrier to achieve more EWLB packages per wafer with encapsulant deposited under temperature and pressureJCET SEMICONDUCTOR SHAOXING CO LTD·Filed 2013·Granted Feb 9, 2021·0 cites·10 claims
- 1648US2013256923A1Semiconductor Device and Method of Forming Reconstituted Wafer With Larger Carrier to Achieve More EWLB Packages Per Wafer with Encapsulant Deposited Under Temperature and PressureSTATS CHIPPAC LTD·Filed 2013·Application pending·0 cites
- 1745US8513098B2Semiconductor device and method of forming reconstituted wafer with larger carrier to achieve more eWLB packages per wafer with encapsulant deposited under temperature and pressurePHUA YOKE HOR·Filed 2011·Granted Aug 20, 2013·0 cites·22 claims
- 1845US6107155AMethod for making a more reliable storage capacitor for dynamic random access memory (DRAM)TAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Aug 22, 2000·8 cites·18 claims
- 1945US6030879AMethod of reducing particles during the manufacturing of fin or cylinder capacitors on a waferTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Feb 29, 2000·12 cites·8 claims
- 2043US9236278B2Integrated circuit packaging system with a substrate embedded dummy-die paddle and method of manufacture thereofHUANG RUI·Filed 2011·Granted Jan 12, 2016·0 cites·20 claims
- 2140US6077778AMethod of improving refresh time in DRAM productsTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Jun 20, 2000·8 cites·2 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →