Inventor · disambiguated record
Stephen Trinh
Also filed as: TRINH STEPHEN · TRINH STEPHEN T
46 granted patents·20 pending applications·132 citations·filing 2005–2025
97Inventor score
Files withSILICON STORAGE TECH INC51ADESTO TECHNOLOGIES CORP5ATMEL CORP5ADESTO TECH CORP1ARTEMIS ACQUISITION LLC1
Top patents by PatentIndex Score
66 records- 0191US10636480B2Concurrent read and reconfigured write operations in a memory deviceADESTO TECHNOLOGIES CORP·Filed 2016·Granted Apr 28, 2020·10 cites·18 claims
- 0291US9037890B2Ultra-deep power-down mode for memory devicesDE CARO RICHARD V·Filed 2012·Granted May 19, 2015·20 cites·26 claims
- 0390US11393546B2Testing circuitry and methods for analog neural memory in artificial neural networkSILICON STORAGE TECH INC·Filed 2019·Granted Jul 19, 2022·6 cites·8 claims
- 0490US11289164B2Word line and control gate line tandem decoder for analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2020·Granted Mar 29, 2022·2 cites·30 claims
- 0590US9812200B2Concurrent read and write operations in a serial flash deviceADESTO TECH CORP·Filed 2015·Granted Nov 7, 2017·12 cites·20 claims
- 0689US11682459B2Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanismSILICON STORAGE TECH INC·Filed 2020·Granted Jun 20, 2023·2 cites·27 claims
- 0788US11600321B2Analog neural memory array storing synapsis weights in differential cell pairs in artificial neural networkSILICON STORAGE TECH INC·Filed 2020·Granted Mar 7, 2023·2 cites·26 claims
- 0887US11056155B1Nonvolatile memory devices, systems and methods with switching charge pump architecturesADESTO TECHNOLOGIES CORP·Filed 2019·Granted Jul 6, 2021·9 cites·16 claims
- 0986US11423979B2Decoding system and physical layout for analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2019·Granted Aug 23, 2022·5 cites·6 claims
- 1086US7301832B2Compact column redundancy CAM architecture for concurrent read and write operations in multi-segment memory arraysATMEL CORP·Filed 2005·Granted Nov 27, 2007·23 cites·9 claims
- 1185US11507642B2Configurable input blocks and output blocks and physical layout for analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2019·Granted Nov 22, 2022·4 cites·63 claims
- 1285US7397699B2Channel discharging after erasing flash memory devicesATMEL CORP·Filed 2005·Granted Jul 8, 2008·10 cites·9 claims
- 1382US10847227B2Charge pump for use in non-volatile flash memory devicesSILICON STORAGE TECH INC·Filed 2018·Granted Nov 24, 2020·3 cites·24 claims
- 1481US2025104783A1Programming of analog non-volatile memory cell in neural networkSILICON STORAGE TECH INC·Filed 2024·Application pending·0 cites
- 1579US12499945B2Adaptive bias decoder for non-volatile memory systemSILICON STORAGE TECH INC·Filed 2023·Granted Dec 16, 2025·0 cites·7 claims
- 1679US12475950B2Adaptive bias decoder for non-volatile memory systemSILICON STORAGE TECH INC·Filed 2023·Granted Nov 18, 2025·0 cites·12 claims
- 1779US12176039B2Setting levels for a programming operation in a neural network arraySILICON STORAGE TECH INC·Filed 2023·Granted Dec 24, 2024·0 cites·9 claims
- 1879US12057170B2Neural network array comprising one or more coarse cells and one or more fine cellsSILICON STORAGE TECH INC·Filed 2023·Granted Aug 6, 2024·0 cites·15 claims
- 1978US12075618B2Input and digital output mechanisms for analog neural memory in a deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2020·Granted Aug 27, 2024·1 cites·22 claims
- 2077US2024312517A1Erasing of a word or a page of non-volatile memory cells in an analog neural memory systemSILICON STORAGE TECH INC·Filed 2024·Application pending·0 cites
- 2176US7515469B1Column redundancy RAM for dynamic bit replacement in FLASH memoryATMEL CORP·Filed 2007·Granted Apr 7, 2009·11 cites·23 claims
- 2276US2023104689A1Adjustable programming circuit for neural networkSILICON STORAGE TECH INC·Filed 2022·Application pending·0 cites
- 2376US2023119017A1Adjustable programming circuit for neural networkSILICON STORAGE TECH INC·Filed 2022·Application pending·0 cites
- 2475US12279428B2Input and output blocks for an array of memory cellsSILICON STORAGE TECH INC·Filed 2023·Granted Apr 15, 2025·0 cites·18 claims
- 2574US12237011B2Read and programming decoding system for analog neural memorySILICON STORAGE TECH INC·Filed 2022·Granted Feb 25, 2025·0 cites·6 claims
- 2674US11915747B2Precision tuning of a page or word of non-volatile memory cells in an analog neural memory systemSILICON STORAGE TECH INC·Filed 2022·Granted Feb 27, 2024·0 cites·9 claims
- 2774US11908513B2Neural memory array storing synapsis weights in differential cell pairsSILICON STORAGE TECH INC·Filed 2023·Granted Feb 20, 2024·0 cites·16 claims
- 2874US11798619B2Precision tuning of a page or word of non-volatile memory cells in an analog neural memory systemSILICON STORAGE TECH INC·Filed 2022·Granted Oct 24, 2023·0 cites·7 claims
- 2974US11783904B2Compensation for leakage in an array of analog neural memory cells in an artificial neural networkSILICON STORAGE TECH INC·Filed 2022·Granted Oct 10, 2023·0 cites·8 claims
- 3074US9852090B2Serial memory device alert of an external host to completion of an internally self-timed operationADESTO TECHNOLOGIES CORP·Filed 2014·Granted Dec 26, 2017·5 cites·20 claims
- 3174US2025174271A1Vector-by-matrix mutiplication array comprising control gate lines perpendicular to word linesSILICON STORAGE TECH INC·Filed 2025·Application pending·0 cites
- 3273US12205655B2Testing of analog neural memory cells in an artificial neural networkSILICON STORAGE TECH INC·Filed 2022·Granted Jan 21, 2025·0 cites·8 claims
- 3373US11935594B2Word line and control gate line tandem decoder for analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2022·Granted Mar 19, 2024·0 cites·4 claims
- 3473US11144824B2Algorithms and circuitry for verifying a value stored during a programming operation of a non-volatile memory cell in an analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2019·Granted Oct 12, 2021·1 cites·16 claims
- 3573US2022398444A1Testing Circuitry And Methods For Analog Neural Memory In Artificial Neural NetworkSILICON STORAGE TECH INC·Filed 2022·Application pending·0 cites
- 3673US2022405564A1Testing Circuitry And Methods For Analog Neural Memory In Artificial Neural NetworkSILICON STORAGE TECH INC·Filed 2022·Application pending·0 cites
- 3771US11532354B2Precision tuning of a page or word of non-volatile memory cells and associated high voltage circuits for an analog neural memory array in an artificial neural networkSILICON STORAGE TECH INC·Filed 2020·Granted Dec 20, 2022·0 cites·16 claims
- 3869US11875852B2Adaptive bias decoder to provide a voltage to a control gate line in an analog neural memory array in artificial neural networkSILICON STORAGE TECH INC·Filed 2021·Granted Jan 16, 2024·0 cites·14 claims
- 3968US11355184B2Analog neural memory array in artificial neural network with substantially constant array source impedance with adaptive weight mapping and distributed powerSILICON STORAGE TECH INC·Filed 2020·Granted Jun 7, 2022·0 cites·41 claims
- 4068US2023325650A1Vector-by-matrix-multiplication array utilizing analog outputsSILICON STORAGE TECH INC·Filed 2022·Application pending·0 cites
- 4168US2023325649A1Vector-by-matrix-multiplication array utilizing analog inputsSILICON STORAGE TECH INC·Filed 2022·Application pending·0 cites
- 4267US12243587B2Multiple row programming operation in artificial neural network arraySILICON STORAGE TECH INC·Filed 2022·Granted Mar 4, 2025·0 cites·15 claims
- 4367US11120881B2Charge pump for use in non-volatile flash memory devicesSILICON STORAGE TECH INC·Filed 2020·Granted Sep 14, 2021·0 cites·6 claims
- 4464US2024119272A1Voltage generator for analog neural memory arraySILICON STROAGE TECH INC·Filed 2023·Application pending·0 cites
- 4561US11449741B2Testing circuitry and methods for analog neural memory in artificial neural networkSILICON STORAGE TECH INC·Filed 2019·Granted Sep 20, 2022·0 cites·8 claims
- 4661US2025068861A1Input block for vector-by-matrix multiplication arraySILICON STORAGE TECH INC·Filed 2023·Application pending·0 cites
- 4760US12353503B2Output array neuron conversion and calibration for analog neural memory in deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2019·Granted Jul 8, 2025·0 cites·13 claims
- 4860US11094375B2Concurrent read and reconfigured write operations in a memory deviceADESTO TECHNOLOGIES CORP·Filed 2020·Granted Aug 17, 2021·0 cites·20 claims
- 4960US9483108B2Ultra-deep power-down mode for memory devicesARTEMIS ACQUISITION LLC·Filed 2015·Granted Nov 1, 2016·2 cites·20 claims
- 5060US7196952B1Column/sector redundancy CAM fast programming scheme using regular memory core array in multi-plane flash memory deviceATMEL CORP·Filed 2005·Granted Mar 27, 2007·4 cites·20 claims
Showing the top 50 of 66 patent records by PatentIndex Score.
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