Inventor · disambiguated record
Vance H. Adams
Also filed as: ADAMS VANCE H
12 granted patents·4 pending applications·171 citations·filing 2004–2013
91Inventor score
Top patents by PatentIndex Score
16 records- 0196US7238580B2Semiconductor fabrication process employing stress inducing source drain structures with graded impurity concentrationFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Jul 3, 2007·59 cites·16 claims
- 0287US7420202B2Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic deviceFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Sep 2, 2008·13 cites·12 claims
- 0382US7041576B2Separately strained N-channel and P-channel transistorsFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted May 9, 2006·37 cites·21 claims
- 0476US7538002B2Semiconductor process integrating source/drain stressors and interlevel dielectric layer stressorsFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted May 26, 2009·7 cites·20 claims
- 0575US7714318B2Electronic device including a transistor structure having an active region adjacent to a stressor layerFREESCALE SEMICONDUCTOR INC·Filed 2008·Granted May 11, 2010·5 cites·20 claims
- 0674US7166897B2Method and apparatus for performance enhancement in an asymmetrical semiconductor deviceFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Jan 23, 2007·19 cites·24 claims
- 0773US7064396B2Integrated circuit with multiple spacer insulating region widthsFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Jun 20, 2006·16 cites·15 claims
- 0868US7205202B2Semiconductor device and method for regional stress controlFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Apr 17, 2007·3 cites·18 claims
- 0965US7161199B2Transistor structure with stress modification and capacitive reduction feature in a width direction and method thereofFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Jan 9, 2007·12 cites·26 claims
- 1049US9847389B2Semiconductor device including an active region and two layers having different stress characteristicsWINSTEAD BRIAN A·Filed 2013·Granted Dec 19, 2017·0 cites·17 claims
- 1147US8569858B2Semiconductor device including an active region and two layers having different stress characteristicsWINSTEAD BRIAN A·Filed 2006·Granted Oct 29, 2013·0 cites·22 claims
- 1247US2007148894A1Semiconductor device and method for regional stress controlFREESCALE SEMICONDUCTOR INC·Filed 2007·Application pending·0 cites
- 1344US2006011988A1Integrated circuit with multiple spacer insulating region widthsCHEN JIAN·Filed 2005·Application pending·0 cites
- 1440US7271069B2Semiconductor device having a plurality of different layers and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Sep 18, 2007·0 cites·19 claims
- 1539US2007249127A1Electronic device including a semiconductor layer and a sidewall spacer and a process of forming the sameFREESCALE SEMICONDUCTOR INC·Filed 2006·Application pending·0 cites
- 1636US2006043500A1Transistor structure with stress modification and capacitive reduction feature in a channel direction and method thereofCHEN JIAN·Filed 2004·Application pending·0 cites
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