Inventor · disambiguated record
Brennan Peterson
Also filed as: PETERSON BRENNAN · PETERSON BRENNAN L · PETERSON BRENNAN LOVELACE
24 granted patents·14 pending applications·113 citations·filing 2004–2024
94Inventor score
Top patents by PatentIndex Score
38 records- 0196US11079687B2Process window based on defect probabilityASML NETHERLANDS BV·Filed 2018·Granted Aug 3, 2021·11 cites·20 claims
- 0295US7719062B2Tuned tensile stress low resistivity slot contact structure for n-type transistor performance enhancementINTEL CORP·Filed 2006·Granted May 18, 2010·33 cites·21 claims
- 0392US8170832B2Measurement and endpointing of sample thicknessYOUNG RICHARD J·Filed 2009·Granted May 1, 2012·16 cites·30 claims
- 0492US8120119B2Stressed barrier plug slot contact structure for transistor performance enhancementFISCHER KEVIN J·Filed 2011·Granted Feb 21, 2012·16 cites·20 claims
- 0589US7968952B2Stressed barrier plug slot contact structure for transistor performance enhancementINTEL CORP·Filed 2006·Granted Jun 28, 2011·12 cites·10 claims
- 0685US8278718B2Stressed barrier plug slot contact structure for transistor performance enhancementFISCHER KEVIN J·Filed 2011·Granted Oct 2, 2012·6 cites·16 claims
- 0784US9653260B2High throughput TEM preparation processes and hardware for backside thinning of cross-sectional view lamellaFEI CO·Filed 2012·Granted May 16, 2017·7 cites·26 claims
- 0882US10883924B2Metallic gratings and measurement methods thereofUNIV NEW YORK STATE RES FOUND·Filed 2015·Granted Jan 5, 2021·4 cites·62 claims
- 0981US2024126181A1Process window based on defect probabilityASML NETHERLANDS BV·Filed 2023·Application pending·0 cites
- 1075US11822255B2Process window based on defect probabilityASML NETHERLANDS BV·Filed 2021·Granted Nov 21, 2023·0 cites·20 claims
- 1175US2024412067A1Metrology Apparatus And Method For Determining A Characteristic Of One Or More Structures On A SubstrateASML NETHERLANDS BV·Filed 2024·Application pending·0 cites
- 1272US11087065B2Method of manufacturing devicesASML NETHERLANDS BV·Filed 2019·Granted Aug 10, 2021·1 cites·21 claims
- 1367US7525197B2Barrier process/structure for transistor trench contact applicationsINTEL CORP·Filed 2006·Granted Apr 28, 2009·3 cites·9 claims
- 1465US9184025B2Measurement and endpointing of sample thicknessYOUNG RICHARD J·Filed 2012·Granted Nov 10, 2015·1 cites·8 claims
- 1564US10254110B2Via characterization for BCD and depth metrologyNANOMETRICS INC·Filed 2014·Granted Apr 9, 2019·1 cites·37 claims
- 1660US7768126B2Barrier formation and structure to use in semiconductor devicesINTEL CORP·Filed 2006·Granted Aug 3, 2010·2 cites·6 claims
- 1756US7601637B2Atomic layer deposited tantalum containing adhesion layerINTEL CORP·Filed 2008·Granted Oct 13, 2009·0 cites·20 claims
- 1854US12112260B2Metrology apparatus and method for determining a characteristic of one or more structures on a substrateASML NETHERLANDS BV·Filed 2019·Granted Oct 8, 2024·0 cites·19 claims
- 1953US11187994B2Method for controlling a manufacturing process and associated apparatusesASML NETHERLANDS BV·Filed 2019·Granted Nov 30, 2021·0 cites·20 claims
- 2053US10283317B2High throughput TEM preparation processes and hardware for backside thinning of cross-sectional view lamellaFEI CO·Filed 2017·Granted May 7, 2019·0 cites·25 claims
- 2150US12386261B2In-resist process for high density contact formationGEMINATIO INC·Filed 2022·Granted Aug 12, 2025·0 cites·20 claims
- 2250US2024377744A1Local shadow masking for multi-color exposuresGEMINATIO INC·Filed 2022·Application pending·0 cites
- 2350US2024419079A1Chemically selective adhesion and strength promoters in semiconductor patterningGEMINATIO INC·Filed 2022·Application pending·0 cites
- 2450US2009170309A1Barrier process/structure for transistor trench contact applicationsCHIKARMANE VINAY·Filed 2009·Application pending·0 cites
- 2550US2025233019A1Multi-level selective patterning for stacked device creationGEMINATIO INC·Filed 2022·Application pending·0 cites
- 2649US11815349B2Methods and systems for inspecting integrated circuits based on X-raysBRUKER NANO INC·Filed 2021·Granted Nov 14, 2023·0 cites·20 claims
- 2749US2025068064A1Anti-spacer based self-aligned high order patterningGEMINATIO INC·Filed 2022·Application pending·0 cites
- 2849US2025132166A1Generation of multiline etch substratesGEMINATIO INC·Filed 2022·Application pending·0 cites
- 2949US2024377749A1Assisted feature placement in semiconductor patterningGEMINATIO INC·Filed 2022·Application pending·0 cites
- 3049US2025132156A1Narrow line cut masking processGEMINATIO INC·Filed 2022·Application pending·0 cites
- 3149US2025130501A1Enhanced field stitching with corrective chemistryGEMINATIO INC·Filed 2022·Application pending·0 cites
- 3249US2025132207A1Optimization for local chemical exposureGEMINATIO INC·Filed 2022·Application pending·0 cites
- 3346US7582558B2Reducing corrosion in copper damascene processesINTEL CORP·Filed 2006·Granted Sep 1, 2009·0 cites·7 claims
- 3444US12169366B2Voltage contrast metrology markASML NETHERLANDS BV·Filed 2018·Granted Dec 17, 2024·0 cites·18 claims
- 3543US10948837B2Information determining apparatus and methodASML NETHERLANDS BV·Filed 2018·Granted Mar 16, 2021·0 cites·21 claims
- 3643US7605469B2Atomic layer deposited tantalum containing adhesion layerINTEL CORP·Filed 2004·Granted Oct 20, 2009·0 cites·6 claims
- 3740US2020152527A1Clearing out method, revealing device, lithographic apparatus, and device manufacturing methodASML NETHERLANDS BV·Filed 2018·Application pending·0 cites
- 3839US2008076246A1Through contact layer opening silicide and barrier layer formationPETERSON BRENNAN L·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →