Inventor · disambiguated record
Jerrell P. Hein
Also filed as: HEIN JERRELL · HEIN JERRELL P · HEIN JERRELL PAUL
43 granted patents·6 pending applications·1,322 citations·filing 1984–2009
98Inventor score
Files withSILICON LAB INC32CIRRUS LOGIC INC6HEIN JERRELL P4CRYSTAL SEMICONDUCTOR CORP2AMERICAN TELEPHONE & TELEGRAPH1
Top patents by PatentIndex Score
49 records- 0196US6111712AMethod to improve the jitter of high frequency phase locked loops used in read channelsCIRRUS LOGIC INC·Filed 1998·Granted Aug 29, 2000·142 cites·18 claims
- 0296US5986830ARead/write channel write precompensation system and method using one or more delay clocksCIRRUS LOGIC INC·Filed 1997·Granted Nov 16, 1999·124 cites·20 claims
- 0395US7436227B2Dual loop architecture useful for a programmable clock source and clock multiplier applicationsSILICON LAB INC·Filed 2004·Granted Oct 14, 2008·61 cites·32 claims
- 0495US7295077B2Multi-frequency clock synthesizerSILICON LAB INC·Filed 2005·Granted Nov 13, 2007·57 cites·25 claims
- 0594US7288998B2Voltage controlled clock synthesizerSILICON LAB INC·Filed 2005·Granted Oct 30, 2007·30 cites·21 claims
- 0694US6141169ASystem and method for control of low frequency input levels to an amplifier and compensation of input offsets of the amplifierCIRRUS LOGIC INC·Filed 1997·Granted Oct 31, 2000·108 cites·14 claims
- 0793US7064617B2Method and apparatus for temperature compensationSILICON LAB INC·Filed 2004·Granted Jun 20, 2006·53 cites·26 claims
- 0892US5990814AMethod and circuit for calibration of flash analog to digital convertersCIRRUS LOGIC INC·Filed 1997·Granted Nov 23, 1999·76 cites·23 claims
- 0989US7187241B2Calibration of oscillator devicesSILICON LAB INC·Filed 2003·Granted Mar 6, 2007·34 cites·46 claims
- 1089US6028727AMethod and system to improve single synthesizer setting times for small frequency steps in read channel circuitsCIRRUS LOGIC INC·Filed 1997·Granted Feb 22, 2000·57 cites·26 claims
- 1187US7145359B2Multiple signal format output bufferSILICON LAB INC·Filed 2004·Granted Dec 5, 2006·33 cites·38 claims
- 1286US6934384B1Subscriber line interface circuitrySILICON LAB INC·Filed 2000·Granted Aug 23, 2005·28 cites·36 claims
- 1383US6686803B1Integrated circuit incorporating circuitry for determining which of at least two possible frequencies is present on an externally provided reference signal and method thereforSILICON LAB INC·Filed 2001·Granted Feb 3, 2004·39 cites·47 claims
- 1481US7825708B2Dual loop architecture useful for a programmable clock source and clock multiplier applicationsSILICON LAB INC·Filed 2008·Granted Nov 2, 2010·10 cites·12 claims
- 1580US4805198AClock multiplier/jitter attenuatorCRYSTAL SEMICONDUCTOR CORP·Filed 1987·Granted Feb 14, 1989·65 cites·14 claims
- 1679US7158633B1Method and apparatus for monitoring subscriber loop interface circuitry power dissipationSILICON LAB INC·Filed 1999·Granted Jan 2, 2007·76 cites·16 claims
- 1779US6724891B1Integrated modem and line-isolation circuitry and associated method powering caller ID circuitry with power provided across an isolation barrierSILICON LAB INC·Filed 2000·Granted Apr 20, 2004·29 cites·28 claims
- 1876US7643629B2Low voltage sensing and control of battery referenced transistors in subscriber loop applicationsSILICON LAB INC·Filed 2005·Granted Jan 5, 2010·4 cites·14 claims
- 1974US6987424B1Narrow band clock multiplier unitSILICON LAB INC·Filed 2002·Granted Jan 17, 2006·19 cites·25 claims
- 2074US6975723B2Architecture for minimum loop current during ringing and caller IDSILICON LAB INC·Filed 2003·Granted Dec 13, 2005·12 cites·42 claims
- 2172US7190785B2Subscriber line interface circuitrySILICON LAB INC·Filed 2004·Granted Mar 13, 2007·8 cites·20 claims
- 2268US8532243B2Digital hold in a phase-locked loopSEETHAMRAJU SRISAI R·Filed 2007·Granted Sep 10, 2013·7 cites·23 claims
- 2366US7227913B1Clock and data recovery circuit without jitter peakingSILICON LAB INC·Filed 2001·Granted Jun 5, 2007·10 cites·25 claims
- 2465US6922469B2Separation of ring detection functions across isolation barrier for minimum powerSILICON LAB INC·Filed 2003·Granted Jul 26, 2005·7 cites·64 claims
- 2562US7453388B1Slice voltage compensationSILICON LAB INC·Filed 2002·Granted Nov 18, 2008·6 cites·25 claims
- 2661US6442271B1Digital isolation system with low power modeSILICON LAB INC·Filed 1998·Granted Aug 27, 2002·32 cites·19 claims
- 2760US2010124326A1Subscriber line interface circuitry with common base audio isolation stageHEIN JERRELL P·Filed 2009·Application pending·0 cites
- 2858US7450712B1Low voltage sensing and control of battery referenced transistors in subscriber loop applicationsSILICON LAB INC·Filed 2000·Granted Nov 11, 2008·2 cites·18 claims
- 2958US2007201687A1Subscriber Line Interface CircuitryHEIN JERRELL P·Filed 2007·Application pending·0 cites
- 3058US2007201686A1Subscriber Line Interface CircuitryHEIN JERRELL P·Filed 2007·Application pending·0 cites
- 3156US6078444ARead channel auxiliary high precision data conversionCIRRUS LOGIC INC·Filed 1996·Granted Jun 20, 2000·12 cites·37 claims
- 3254US7486787B2Subscriber line interface circuitry with common base audio isolation stageSILICON LAB INC·Filed 2006·Granted Feb 3, 2009·0 cites·20 claims
- 3354US6456712B1Separation of ring detection functions across isolation barrier for minimum powerSILICON LAB INC·Filed 1998·Granted Sep 24, 2002·21 cites·24 claims
- 3454US6298133B1Telephone line interface architecture using ringer inputs for caller ID dataSILICON LAB INC·Filed 1998·Granted Oct 2, 2001·21 cites·48 claims
- 3553US5150386AClock multiplier/jitter attenuatorCRYSTAL SEMICONDUCTOR CORP·Filed 1989·Granted Sep 22, 1992·19 cites·16 claims
- 3651US7454306B2Frequency margin testingSILICON LAB INC·Filed 2005·Granted Nov 18, 2008·1 cites·17 claims
- 3751US6104794AArchitecture for minimum loop current during ringing and caller IDSILICON LAB INC·Filed 1998·Granted Aug 15, 2000·17 cites·20 claims
- 3849US7254230B2Subscriber line interface circuitrySILICON LAB INC·Filed 2005·Granted Aug 7, 2007·0 cites·17 claims
- 3949US6198816B1Capacitively coupled ring detector with power provided across isolation barrierSILICON LAB INC·Filed 1998·Granted Mar 6, 2001·22 cites·46 claims
- 4049US4595874ATemperature insensitive CMOS precision current sourceAT & T BELL LAB·Filed 1984·Granted Jun 17, 1986·11 cites·7 claims
- 4148US6408034B1Framed delta sigma data with unlikely delta sigma data patternsSILICON LAB INC·Filed 1998·Granted Jun 18, 2002·22 cites·20 claims
- 4248US6307891B1Method and apparatus for freezing a communication link during a disruptive eventSILICON LAB INC·Filed 1998·Granted Oct 23, 2001·15 cites·20 claims
- 4345US7180999B1Subscriber line interface circuitrySILICON LAB INC·Filed 1999·Granted Feb 20, 2007·7 cites·23 claims
- 4445US2005220293A1Subscriber loop interface circuitry with tracking battery supplyHEIN JERRELL P·Filed 2005·Application pending·0 cites
- 4542US5717728AData/clock recovery circuitLUCENT TECHNOLOGIES INC·Filed 1996·Granted Feb 10, 1998·16 cites·5 claims
- 4642US2007146083A1Calibration of oscillator devicesHEIN JERRELL·Filed 2007·Application pending·0 cites
- 4740US6567521B1Subscriber loop interface circuitry having bifurcated common mode controlSILICON LAB INC·Filed 1999·Granted May 20, 2003·7 cites·18 claims
- 4834US2005068118A1Reconfigurable terminalSILICON LAB INC·Filed 2003·Application pending·0 cites
- 4933US4902913AAnalog comparatorAMERICAN TELEPHONE & TELEGRAPH·Filed 1988·Granted Feb 20, 1990·2 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →