Inventor · disambiguated record
Edmund Blackshear
Also filed as: BLACKSHEAR EDMUND · BLACKSHEAR EDMUND D · BLACKSHEAR EDMUND DAVID
29 granted patents·7 pending applications·345 citations·filing 1991–2020
97Inventor score
Top patents by PatentIndex Score
36 records- 0197US10748852B1Multi-chip module (MCM) with chip-to-chip connection redundancy and methodMARVELL INT LTD·Filed 2019·Granted Aug 18, 2020·20 cites·20 claims
- 0292US10598860B2Photonic die fan out package with edge fiber coupling interface and related methodsGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 24, 2020·10 cites·20 claims
- 0391US8378498B2Chip assembly with a coreless substrate employing a patterned adhesive layerIBM·Filed 2010·Granted Feb 19, 2013·10 cites·20 claims
- 0490US6774475B2Vertically stacked memory chips in FBGA packagesIBM·Filed 2002·Granted Aug 10, 2004·65 cites·17 claims
- 0589US7095104B2Overlap stacking of center bus bonded memory chips for double density and method of manufacturing the sameIBM·Filed 2003·Granted Aug 22, 2006·53 cites·15 claims
- 0687US9743526B1Wiring board with stacked embedded capacitors and method of makingIBM·Filed 2016·Granted Aug 22, 2017·8 cites·20 claims
- 0785US6507122B2Pre-bond encapsulation of area array terminated chip and wafer scale packagesIBM·Filed 2001·Granted Jan 14, 2003·28 cites·14 claims
- 0884US7174233B1Quality/reliability system and method in multilevel manufacturing environmentIBM·Filed 2005·Granted Feb 6, 2007·20 cites·20 claims
- 0983US9105535B2Copper feature design for warpage control of substratesBLACKSHEAR EDMUND·Filed 2012·Granted Aug 11, 2015·6 cites·8 claims
- 1082US9040388B2Chip assembly with a coreless substrate employing a patterned adhesive layerIBM·Filed 2013·Granted May 26, 2015·4 cites·17 claims
- 1181US9659131B2Copper feature design for warpage control of substratesGLOBALFOUNDRIES INC·Filed 2015·Granted May 23, 2017·3 cites·11 claims
- 1280US9093563B2Electronic module assembly with patterned adhesive arrayIBM·Filed 2013·Granted Jul 28, 2015·4 cites·21 claims
- 1379US9048245B2Method for shaping a laminate substrateBLACKSHEAR EDMUND·Filed 2012·Granted Jun 2, 2015·5 cites·20 claims
- 1477US9305894B2Constrained die adhesion cure processGLOBALFOUNDRIES INC·Filed 2013·Granted Apr 5, 2016·3 cites·9 claims
- 1573US6469375B2High bandwidth 3D memory packaging techniqueFiled 2001·Granted Oct 22, 2002·21 cites·3 claims
- 1670US9059240B2Fixture for shaping a laminate substrateBLACKSHEAR EDMUND D·Filed 2012·Granted Jun 16, 2015·3 cites·25 claims
- 1770US6130479ANickel alloy films for reduced intermetallic formation in solderIBM·Filed 1999·Granted Oct 10, 2000·25 cites·8 claims
- 1868US6919515B2Stress accommodation in electronic device interconnect technology for millimeter contact locationsIBM·Filed 2001·Granted Jul 19, 2005·15 cites·8 claims
- 1965US9129942B2Method for shaping a laminate substrateBLACKSHEAR EDMUND D·Filed 2012·Granted Sep 8, 2015·2 cites·18 claims
- 2064US9543253B2Method for shaping a laminate substrateGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 10, 2017·1 cites·20 claims
- 2161US9818682B2Laminate substrates having radial cut metallic planesIBM·Filed 2014·Granted Nov 14, 2017·1 cites·19 claims
- 2258US6312972B1Pre-bond encapsulation of area array terminated chip and wafer scale packagesIBM·Filed 1999·Granted Nov 6, 2001·18 cites·8 claims
- 2357US11342697B2Dual-level pad card edge self-guide and alignment of connectorIBM·Filed 2020·Granted May 24, 2022·0 cites·20 claims
- 2456US9293439B2Electronic module assembly with patterned adhesive arrayGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 22, 2016·0 cites·7 claims
- 2556US2009155552A1Ic chip package substrate having outermost glass fiber reinforced epoxy layers and related methodIBM·Filed 2007·Application pending·0 cites
- 2655US5095699AStirling type cylinder force amplifierIBM·Filed 1991·Granted Mar 17, 1992·17 cites·4 claims
- 2753US10813215B2Multi-layer circuit using metal layers as a moisture diffusion barrier for electrical performanceIBM·Filed 2016·Granted Oct 20, 2020·0 cites·16 claims
- 2853US10687420B2Multi-layer circuit using metal layers as a moisture diffusion barrier for electrical performanceIBM·Filed 2016·Granted Jun 16, 2020·0 cites·11 claims
- 2952US6444562B1Nickel alloy films for reduced intermetallic formation in solderIBM·Filed 2000·Granted Sep 3, 2002·3 cites·7 claims
- 3051US10806030B2Multi-layer circuit using metal layers as a moisture diffusion barrier for electrical performanceIBM·Filed 2015·Granted Oct 13, 2020·0 cites·13 claims
- 3147US2016211161A1Constrained die adhesion cure processGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 3247US2010164030A1Chip carrier bearing large silicon for high performance computing and related methodIBM·Filed 2008·Application pending·0 cites
- 3346US2007187474A1Method, system, and computer program product for managing technology information associated with a supply chainIBM·Filed 2006·Application pending·0 cites
- 3445US2009294971A1Electroless nickel leveling of lga pad sites for high performance organic lgaIBM·Filed 2008·Application pending·0 cites
- 3540US2019363047A1Fan-out connections of processors on a panel assemblyGLOBALFOUNDRIES INC·Filed 2018·Application pending·0 cites
- 3635US2002092895A1Formation of a solder joint having a transient liquid phase by annealing and quenchingFiled 2001·Application pending·0 cites
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