Inventor · disambiguated record
Cheng-En Ho
Also filed as: HO CHENG EN
12 granted patents·7 pending applications·37 citations·filing 2002–2023
84Inventor score
Files withUNIV YUAN ZE9HO CHENG-EN4KINSUS INTERCONNECT TECH CORP2UNIV NAT CENTRAL1UNIV NAT YUNLIN SCI & TECH1
Top patents by PatentIndex Score
19 records- 0178US6602777B1Method for controlling the formation of intermetallic compounds in solder jointsUNIV NAT CENTRAL·Filed 2002·Granted Aug 5, 2003·26 cites·45 claims
- 0274US8092621B2Method for inhibiting growth of nickel-copper-tin intermetallic layer in solder jointsHO CHENG-EN·Filed 2010·Granted Jan 10, 2012·5 cites·4 claims
- 0367US9194822B2Adjustable fixture structure for 3-dimensional X-ray computed tomographyUNIV YUAN ZE·Filed 2013·Granted Nov 24, 2015·2 cites·10 claims
- 0467US8049650B2Method for testing a high-speed digital to analog converter based on an undersampling techniqueUNIV NAT YUNLIN SCI & TECH·Filed 2010·Granted Nov 1, 2011·4 cites·3 claims
- 0566US2024102194A1Plating system and method thereofUNIV YUAN ZE·Filed 2023·Application pending·0 cites
- 0650US12283488B2Interconnect structure for insertion loss reduction in signal transmission and method thereofUNIV YUAN ZE·Filed 2021·Granted Apr 22, 2025·0 cites·10 claims
- 0750US11439007B2Nanotwinned structureUNIV YUAN ZE·Filed 2019·Granted Sep 6, 2022·0 cites·19 claims
- 0848US11430693B1Method for microstructure modification of conducting linesUNIV YUAN ZE·Filed 2021·Granted Aug 30, 2022·0 cites·8 claims
- 0948US2008280785A1Fluidic nano/micro array chip and chipset thereofUNIV TSINGHUA·Filed 2008·Application pending·0 cites
- 1047US2010127047A1Method of inhibiting a formation of palladium-nickel-tin intermetallic in solder jointsUNIV YUAN ZE·Filed 2009·Application pending·0 cites
- 1146US7950565B2High speed ball shear machineUNIV YUAN ZE·Filed 2009·Granted May 31, 2011·0 cites·16 claims
- 1245US8207469B2Method for inhibiting electromigration-induced phase segregation in solder jointsHO CHENG-EN·Filed 2008·Granted Jun 26, 2012·0 cites·18 claims
- 1345US2020048786A1High-speed electroplating methodUNIV YUAN ZE·Filed 2019·Application pending·0 cites
- 1444US8702878B2Method for controlling beta-tin orientation in solder jointsHO CHENG-EN·Filed 2011·Granted Apr 22, 2014·0 cites·2 claims
- 1541US9744624B2Method for manufacturing circuit boardKINSUS INTERCONNECT TECH CORP·Filed 2015·Granted Aug 29, 2017·0 cites·18 claims
- 1640US2013153646A1Method for suppressing kirkendall voids formation at the interface between solder and copper padHO CHENG-EN·Filed 2012·Application pending·0 cites
- 1739US9079272B2Solder joint with a multilayer intermetallic compound structureUNIV YUAN ZE·Filed 2013·Granted Jul 14, 2015·0 cites·10 claims
- 1833US2003219623A1Solder joints with low consumption rate of nickel layerFiled 2003·Application pending·0 cites
- 1928US2016372409A1Circuit board structureKINSUS INTERCONNECT TECH CORP·Filed 2015·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →