Inventor · disambiguated record
Burkhard Giebel
Also filed as: GIEBEL BURKHARD
19 granted patents·2 pending applications·397 citations·filing 1980–2006
95Inventor score
Top patents by PatentIndex Score
21 records- 0197US4733394AElectrically programmable semiconductor memory showing redundanceITT IND GMBH DEUTSCHE·Filed 1986·Granted Mar 22, 1988·173 cites·2 claims
- 0289US4750158AIntegrated matrix of nonvolatile, reprogrammable storage cellsITT·Filed 1983·Granted Jun 7, 1988·46 cites·4 claims
- 0373US5451861AMethod of setting the output current of a monolithic integrated pad driverITT IND GMBH DEUTSCHE·Filed 1993·Granted Sep 19, 1995·25 cites·18 claims
- 0469US4527256AElectrically erasable memory matrix (EEPROM)ITT·Filed 1983·Granted Jul 2, 1985·19 cites·9 claims
- 0567US5326994AProtective circuit for protecting contacts of monolithic integrated circuits by preventing parasitic latch up with other integrated circuit elementsITT IND GMBH DEUTSCHE·Filed 1992·Granted Jul 5, 1994·30 cites·6 claims
- 0663US4597064AElectrically programmable memory matrixITT·Filed 1983·Granted Jun 24, 1986·15 cites·5 claims
- 0760US7293120B2DMA module having plurality of first addressable locations and determining if first addressable locations are associated with originating DMA processMICRONAS GMBH·Filed 2004·Granted Nov 6, 2007·6 cites·11 claims
- 0859US4502131AElectrically programmable memory matrixITT·Filed 1983·Granted Feb 26, 1985·12 cites·9 claims
- 0956US4458338ACircuit for checking memory cells of programmable MOS-integrated semiconductor memoriesSIEMENS AG·Filed 1981·Granted Jul 3, 1984·12 cites·5 claims
- 1052US4388541ACircuit arrangement with MOS-transistors for the rapid evaluation of the logic state of a sampling nodeSIEMENS AG·Filed 1980·Granted Jun 14, 1983·8 cites·5 claims
- 1151US4524429AIntegrated memory matrix comprising nonvolatile reprogrammable storage cellsITT·Filed 1983·Granted Jun 18, 1985·8 cites·3 claims
- 1249US2007299991A1DMA module and operating system thereforGIEBEL BURKHARD·Filed 2006·Application pending·0 cites
- 1348US4922139AFilter circuit for generating a VCO control voltage responsive to the output signals from a frequency/phase discriminatorITT IND GMBH DEUTSCHE·Filed 1989·Granted May 1, 1990·9 cites·6 claims
- 1447US4435789ACircuit for a read-only memory organized in rows and columns to prevent bit line potentials from droppingSIEMENS AG·Filed 1981·Granted Mar 6, 1984·8 cites·7 claims
- 1544US2009153187A1Monolithically integrated interface circuitMICRONAS GMBH·Filed 2004·Application pending·0 cites
- 1643US5912581ASpurious-emission-reducing terminal configuration for an integrated circuitMICRONAS SEMICONDUCTOR HOLDING·Filed 1997·Granted Jun 15, 1999·8 cites·18 claims
- 1741US4742253AIntegrated insulated-gate field-effect transistor circuit for evaluating the voltage of a node to be sampled against a fixed reference voltageITT·Filed 1983·Granted May 3, 1988·4 cites·8 claims
- 1837US5608346AMOS driver circuit for suppressing interference by preventing shunt currentsITT IND GMBH DEUTSCHE·Filed 1995·Granted Mar 4, 1997·5 cites·19 claims
- 1934US4803657ASerial first-in-first-out (FIFO) memory and method for clocking the sameITT IND GMBH DEUTSCHE·Filed 1987·Granted Feb 7, 1989·4 cites·5 claims
- 2031US4882610AProtective arrangement for MOS circuitsITT IND GMBH DEUTSCHE·Filed 1988·Granted Nov 21, 1989·2 cites·6 claims
- 2131US4459608AReprogrammable semiconductor read-only memory of the floating-gate typeSIEMENS AG·Filed 1982·Granted Jul 10, 1984·3 cites·3 claims
Join the waitlist — get patent alerts
Get an alert when Burkhard Giebel files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →