Inventor · disambiguated record
Steven Leibiger
Also filed as: LEIBIGER STEVEN · LEIBIGER STEVEN M
17 granted patents·2 pending applications·181 citations·filing 1990–2013
93Inventor score
Top patents by PatentIndex Score
19 records- 0186US9117845B2Production of laterally diffused oxide semiconductor (LDMOS) device and a bipolar junction transistor (BJT) device using a semiconductor processFAIRCHILD SEMICONDUCTOR·Filed 2013·Granted Aug 25, 2015·8 cites·20 claims
- 0284US8878275B2LDMOS device with double-sloped field plateFAIRCHILD SEMICONDUCTOR·Filed 2013·Granted Nov 4, 2014·7 cites·17 claims
- 0384US5079182ABicmos device having self-aligned well tap and method of fabricationNAT SEMICONDUCTOR CORP·Filed 1990·Granted Jan 7, 1992·54 cites·10 claims
- 0479US6100125ALDD structure for ESD protection and method of fabricationFAIRCHILD SEMICONDUCTOR·Filed 1998·Granted Aug 8, 2000·47 cites·6 claims
- 0578US8080847B2Low on resistance CMOS “wave” transistor for integrated circuit applicationsLEIBIGER STEVEN·Filed 2009·Granted Dec 20, 2011·8 cites·24 claims
- 0671US8076722B2PN junction and MOS capacitor hybrid resurf transistorLEIBIGER STEVEN·Filed 2010·Granted Dec 13, 2011·3 cites·10 claims
- 0771US6700474B1High value polysilicon resistorFAIRCHILD SEMICONDUCTOR·Filed 2002·Granted Mar 2, 2004·17 cites·17 claims
- 0870US7763939B2Low on resistance CMOS transistor for integrated circuit applicationsFAIRCHILD SEMICONDUCTOR·Filed 2008·Granted Jul 27, 2010·4 cites·30 claims
- 0961US7824999B2Method for enhancing field oxideFAIRCHILD SEMICONDUCTOR·Filed 2008·Granted Nov 2, 2010·1 cites·17 claims
- 1061US6927460B1Method and structure for BiCMOS isolated NMOS transistorFAIRCHILD SEMICONDUCTOR·Filed 2003·Granted Aug 9, 2005·10 cites·7 claims
- 1159US8987107B2Production of high-performance passive devices using existing operations of a semiconductor processFAIRCHILD SEMICONDUCTOR·Filed 2013·Granted Mar 24, 2015·1 cites·19 claims
- 1252US5466960ABiCMOS device having self-aligned well tap and method of fabricationNAT SEMICONDUCTOR CORP·Filed 1991·Granted Nov 14, 1995·13 cites·4 claims
- 1351US7018778B1Single polisilicon emitter bipolar junction transistor processing technique using cumulative photo resist application and patterningFAIRCHILD SEMICONDUCTOR·Filed 2003·Granted Mar 28, 2006·7 cites·6 claims
- 1447US7795671B2PN junction and MOS capacitor hybrid RESURF transistorFAIRCHILD SEMICONDUCTOR·Filed 2007·Granted Sep 14, 2010·0 cites·24 claims
- 1544US8822296B2Use of plate oxide layers to increase bulk oxide thickness in semiconductor devicesFAIRCHILD SEMICONDUCTOR·Filed 2012·Granted Sep 2, 2014·0 cites·20 claims
- 1643US9263431B2Method and apparatus for integrated circuit protectionFAIRCHILD SEMICONDUCTOR·Filed 2013·Granted Feb 16, 2016·0 cites·14 claims
- 1740US2005275058A1Method for enhancing field oxide and integrated circuit with enhanced field oxideLEIBIGER STEVEN M·Filed 2004·Application pending·0 cites
- 1838US6972472B1Quasi self-aligned single polysilicon bipolar active device with intentional emitter window undercutFAIRCHILD SEMICONDUCTOR·Filed 2003·Granted Dec 6, 2005·1 cites·6 claims
- 1933US2004248357A1Quasi self-aligned single polysilicon bipolar active device with intentional emitter window undercutFiled 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →