Inventor · disambiguated record
Mark A. Check
Also filed as: CHECK MARK A · CHECK MARK ANTHONY · SMITH LEGAL REPRESENTATIVE EVANGELYN K
46 granted patents·9 pending applications·539 citations·filing 1995–2023
98Inventor score
Top patents by PatentIndex Score
55 records- 0195US8656228B2Memory error isolation and recovery in a multiprocessor computer systemCHECK MARK A·Filed 2010·Granted Feb 18, 2014·69 cites·25 claims
- 0292US7136954B2Data communication method and apparatus utilizing credit-based data transfer protocol and credit loss detection mechanismIBM·Filed 2005·Granted Nov 14, 2006·25 cites·16 claims
- 0391US7647435B2Data communication method and apparatus utilizing credit-based data transfer protocol and credit loss detection mechanismIBM·Filed 2007·Granted Jan 12, 2010·20 cites·14 claims
- 0491US7617410B2Simultaneously updating logical time of day (TOD) clocks for multiple cpus in response to detecting a carry at a pre-determined bit position of a physical clockIBM·Filed 2006·Granted Nov 10, 2009·26 cites·33 claims
- 0584US7249207B2Internal data bus interconnection mechanism utilizing central interconnection module converting data in different alignment domainsIBM·Filed 2005·Granted Jul 24, 2007·14 cites·18 claims
- 0682US7882278B2Utilizing programmable channels for allocation of buffer space and transaction control in data communicationsIBM·Filed 2009·Granted Feb 1, 2011·10 cites·20 claims
- 0782US7493426B2Data communication method and apparatus utilizing programmable channels for allocation of buffer space and transaction controlIBM·Filed 2005·Granted Feb 17, 2009·10 cites·12 claims
- 0878US6865645B1Program store compare handling between instruction and operand cachesIBM·Filed 2000·Granted Mar 8, 2005·27 cites·25 claims
- 0976US8438415B2Performing a perform timing facility function instruction for synchronizing TOD clocksENGLER EBERHARD·Filed 2012·Granted May 7, 2013·3 cites·24 claims
- 1075US10102165B2Arbitration in an SRIOV environmentIBM·Filed 2014·Granted Oct 16, 2018·3 cites·14 claims
- 1174US7739545B2System and method to support use of bus spare wires in connection modulesIBM·Filed 2006·Granted Jun 15, 2010·8 cites·17 claims
- 1274US7277974B2Data communication method and apparatus utilizing credit-based data transfer protocol and credit loss detection mechanismIBM·Filed 2006·Granted Oct 2, 2007·5 cites·12 claims
- 1373US7725894B2Enhanced un-privileged computer instruction to store a facility listIBM·Filed 2006·Granted May 25, 2010·5 cites·20 claims
- 1473US7167968B2Storage pre-alignment and EBCDIC, ASCII and unicode basic latin conversions for packed decimal dataIBM·Filed 2004·Granted Jan 23, 2007·20 cites·20 claims
- 1569US8135978B2Performing a perform timing facility function instruction for sychronizing TOD clocksENGLER EBERHARD·Filed 2009·Granted Mar 13, 2012·3 cites·17 claims
- 1668US7089408B2Re-fetch of long operand buffered remainder after cache line invalidation in out-of-order multiprocessor system without instruction re-executionIBM·Filed 2003·Granted Aug 8, 2006·14 cites·12 claims
- 1766US8555234B2Verification of soft error resilienceTREMAINE ROBERT BRETT·Filed 2009·Granted Oct 8, 2013·5 cites·20 claims
- 1865US9703973B2Customer load of field programmable gate arraysIBM·Filed 2015·Granted Jul 11, 2017·1 cites·14 claims
- 1965US6671794B1Address generation interlock detectionIBM·Filed 2000·Granted Dec 30, 2003·11 cites·25 claims
- 2063US2025131351A1Personalized artificial intelligence break schedulerIBM·Filed 2023·Application pending·0 cites
- 2156US10255450B2Customer load of field programmable gate arraysIBM·Filed 2017·Granted Apr 9, 2019·0 cites·17 claims
- 2256US6092185AOpcode compare logic in E-unit for breaking infinite loops, detecting invalid opcodes and other exception checkingIBM·Filed 1998·Granted Jul 18, 2000·31 cites·9 claims
- 2356US5790844AMillicode load and test access instruction that blocks interrupts in response to access exceptionsIBM·Filed 1997·Granted Aug 4, 1998·23 cites·1 claims
- 2455US9875367B2Customer load of field programmable gate arraysIBM·Filed 2017·Granted Jan 23, 2018·0 cites·20 claims
- 2555US6745313B2Absolute address bits kept in branch history tableIBM·Filed 2002·Granted Jun 1, 2004·4 cites·18 claims
- 2654US2009259875A1Store Clock and Store Clock Fast Instruction ExecutionIBM·Filed 2009·Application pending·0 cites
- 2753US7035986B2System and method for simultaneous access of the same line in cache storageIBM·Filed 2003·Granted Apr 25, 2006·3 cites·18 claims
- 2853US5748951ASpecialized millicode instructions which reduce cycle time and number of instructions necessary to perform complex operationsIBM·Filed 1997·Granted May 5, 1998·21 cites·1 claims
- 2952US7103754B2Computer instructions for having extended signed displacement fields for finding instruction operandsIBM·Filed 2003·Granted Sep 5, 2006·2 cites·33 claims
- 3052US6990556B2System and method for simultaneous access of the same doubleword in cache storageIBM·Filed 2003·Granted Jan 24, 2006·2 cites·18 claims
- 3152US5694587ASpecialized millicode instructions for test PSW validity, load with access test, and character translation assistIBM·Filed 1995·Granted Dec 2, 1997·20 cites·1 claims
- 3250US10108569B2Arbitration in an SRIOV environmentIBM·Filed 2015·Granted Oct 23, 2018·0 cites·7 claims
- 3350US7886089B2Method, system and computer program product for enhanced shared store buffer management scheme for differing buffer sizes with limited resources for optimized performanceIBM·Filed 2008·Granted Feb 8, 2011·0 cites·9 claims
- 3450US6751708B2Method for ensuring that a line is present in an instruction cacheIBM·Filed 2002·Granted Jun 15, 2004·1 cites·21 claims
- 3549US8433950B2System to determine fault tolerance in an integrated circuit and associated methodsCHECK MARK A·Filed 2009·Granted Apr 30, 2013·0 cites·28 claims
- 3649US5903479AMethod and system for executing denormalized numbersIBM·Filed 1997·Granted May 11, 1999·22 cites·14 claims
- 3749US2006195680A1Computer instruction value field having an embedded signIBM·Filed 2006·Application pending·0 cites
- 3847US6125444AMillimode capable computer system providing global branch history table disables and separate millicode disables which enable millicode disable to be turned off for some sections of code execution but not disabled for allIBM·Filed 1998·Granted Sep 26, 2000·18 cites·14 claims
- 3946US6108776AGlobally or selectively disabling branch history table operations during sensitive portion of millicode routine in millimode supporting computerIBM·Filed 1998·Granted Aug 22, 2000·18 cites·9 claims
- 4045US6973552B2System and method to handle page validation with out-of-order fetchIBM·Filed 2003·Granted Dec 6, 2005·0 cites·21 claims
- 4145US2008071502A1Method and system of recording time of day clockIBM·Filed 2006·Application pending·0 cites
- 4245US2005216713A1Instruction text controlled selectively stated branches for prediction via a branch target bufferIBM·Filed 2004·Application pending·0 cites
- 4345US2008065834A1Method to Prevent Operand Data with No Locality from Polluting the Data CacheIBM·Filed 2006·Application pending·0 cites
- 4444US6035392AComputer with optimizing hardware for conditional hedge fetching into cache storageIBM·Filed 1998·Granted Mar 7, 2000·17 cites·7 claims
- 4543US6178495B1Processor E-unit to I-unit interface instruction modification with E-unit opcode computer logic in the unitIBM·Filed 1998·Granted Jan 23, 2001·15 cites·9 claims
- 4643US2006174050A1Internal data bus interconnection mechanism utilizing shared buffers supporting communication among multiple functional components of an integrated circuit chipIBM·Filed 2005·Application pending·0 cites
- 4743US2009213735A1System to improve data packet routing in a data processing device and associated methodsCHECK MARK A·Filed 2008·Application pending·0 cites
- 4842US6138223AAbsolute address history table index generation for predicting instruction and operand cache accessesIBM·Filed 1998·Granted Oct 24, 2000·14 cites·8 claims
- 4941US6085313AComputer processor system for executing RXE format floating point instructionsIBM·Filed 1998·Granted Jul 4, 2000·13 cites·3 claims
- 5041US2004230813A1Cryptographic coprocessor on a general purpose microprocessorIBM·Filed 2003·Application pending·0 cites
Showing the top 50 of 55 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →