Store Clock and Store Clock Fast Instruction Execution

Abstract

Two forms of TOD Clock instructions are provided, Store Clock and Store Clock Fast. Execution of the Store Clock Fast instruction may produce a time of day (TOD) result that is exactly the same as a previous TOD result, however execution of Store Clock Fast instructions while the clock is running always produce unique TOD results.

1 . A computer implemented method for executing instructions for storing a value of a time-of-day (TOD) clock, the method comprising:
 obtaining a first instruction for execution by a Central Processing Unit (CPU) of one or more CPUs in the system; and   initiating execution of the obtained first instruction while the TOD clock is incrementing in a set state, the execution of the first instruction comprising 1) and 2):   1) obtaining a first TOD clock value; and   2) storing the first TOD clock value in storage;   obtaining a second instruction for execution by a CPU of the one or more CPUs in the system; and   subsequent to the initiating execution of the first instruction, initiating execution of the obtained second instruction while the TOD clock is incrementing in the set state, the execution of the second instruction comprising 3) through 5);   3) obtaining a second TOD clock value; and   4) responsive to both the first instruction and the second instruction being STORE CLOCK instructions, storing the second TOD clock value in storage wherein the second TOD clock value obtained while the TOD clock is incrementing in the set state is always different than the first TOD clock value obtained while the TOD clock is incrementing in the set state; and   5) responsive to the second instruction being a STORE CLOCK FAST instruction, storing the second TOD clock value in storage wherein the obtained second time TOD clock value is identical to the obtained first TOD clock value.   
   
   
       2 . The method according to  claim 1 , wherein each of the first TOD clock value and the second TOD clock value comprise two fields consisting of an incrementing field and a non-incrementing field, wherein the incrementing field comprising a least significant bit, wherein the non-incrementing field comprises a most significant bit, wherein the incrementing field is incremented based on a system clock, wherein the non-incrementing field is not incrementing, wherein the most significant bit of the incrementing field is more significant than the high order bit of the non-incrementing field further comprising:
 responsive to the second instruction being a STORE CLOCK instruction, the non-incrementing field comprising one or more non-zero value bits for ensuring that the second TOD clock value is unique; and   responsive to the second instruction being a STORE CLOCK FAST instruction, the non-incrementing field consisting of all zero value bits.   
   
   
       3 . The method according to  claim 2 , wherein the quality of the TOD clock value stored by an instruction is indicated by the setting of a condition code value in a condition code comprising:
 responsive to the TOD clock value being set, setting a condition code value of zero;   responsive to the TOD clock value being not set, setting a condition code value of one, wherein the TOD clock value indicates elapsed time since power to the clock was turned on; and   responsive to the TOD clock being in either a stopped state or a not-operational state, setting a condition code value of three.   
   
   
       4 . The method according to  claim 3 , wherein the non-incrementing field consists of zero value bits when the TOD clock for the system is stopped. 
   
   
       5 . The method according to  claim 1 , wherein the STORE CLOCK FAST instruction is provided by the STORE CLOCK FAST facility that is indicated as being installed on a CPU of the system by an indicator bit readable by any one of a STORE FACILITY LIST instruction or a STORE FACILITY LIST EXTENDED instruction. 
   
   
       6 . The method according to  claim 1 , further comprising:
 obtaining for execution a STORE CLOCK FAST machine instruction, the STORE CLOCK FAST machine instruction being defined for computer execution according to a computer architecture, the STORE CLOCK FAST machine instruction comprising an opcode field, a field for identifying a base register (B 2 ) and a displacement field (D 2 );
 executing the obtained STORE CLOCK FAST machine instruction, the execution comprising: 
 1) arithmetically adding contents of the base register to the displacement field to determine a storage address; 
 2) obtaining the TOD clock value; and 
 3) storing the TOD clock value at the determined storage address. 
   
   
   
       7 . A computer program product for executing instructions for storing a value of a time-of-day (TOD) clock, the computer program product comprising:
 obtaining a first instruction for execution by a Central Processing Unit (CPU) of one or more CPUs in the system; and   initiating execution of the obtained first instruction while the TOD clock is incrementing in a set state, the execution of the first instruction comprising 1) and 2):   1) obtaining a first TOD clock value; and   2) storing the first TOD clock value in storage;   obtaining a second instruction for execution by a CPU of the one or more CPUs in the system; and   subsequent to the initiating execution of the first instruction, initiating execution of the obtained second instruction while the TOD clock is incrementing in the set state, the execution of the second instruction comprising 3) through 5);   3) obtaining a second TOD clock value; and   4) responsive to both the first instruction and the second instruction being STORE CLOCK instructions, storing the second TOD clock value in storage wherein the second TOD clock value obtained while the TOD clock is incrementing in the set state is always different than the first TOD clock value obtained while the TOD clock is incrementing in the set state; and   5) responsive to the second instruction being a STORE CLOCK FAST instruction, storing the second TOD clock value in storage wherein the obtained second time TOD clock value is identical to the obtained first TOD clock value.   
   
   
       8 . The computer program product according to  claim 7 , wherein each of the first TOD clock value and the second TOD clock value comprise two fields consisting of an incrementing field and a non-incrementing field, wherein the incrementing field comprising a least significant bit, wherein the non-incrementing field comprises a most significant bit, wherein the incrementing field is incremented based on a system clock, wherein the non-incrementing field is not incrementing, wherein the most significant bit of the incrementing field is more significant than the high order bit of the non-incrementing field further comprising:
 responsive to the second instruction being a STORE CLOCK instruction, the non-incrementing field comprising one or more non-zero value bits for ensuring that the second TOD clock value is unique; and   responsive to the second instruction being a STORE CLOCK FAST instruction, the non-incrementing field consisting of all zero value bits.   
   
   
       9 . The computer program product according to  claim 8 , wherein the quality of the TOD clock value stored by an instruction is indicated by the setting of a condition code value in a condition code comprising:
 responsive to the TOD clock value being set, setting a condition code value of zero;   responsive to the TOD clock value being not set, setting a condition code value of one, wherein the TOD clock value indicates elapsed time since power to the clock was turned on; and   responsive to the TOD clock being in either a stopped state or a not-operational state, setting a condition code value of three.   
   
   
       10 . The computer program product according to  claim 9 , wherein the non-incrementing field consists of zero value bits when the TOD clock for the system is stopped. 
   
   
       11 . The computer program product according to  claim 7 , wherein the STORE CLOCK FAST instruction is provided by the STORE CLOCK FAST facility that is indicated as being installed on a CPU of the system by an indicator bit readable by any one of a STORE FACILITY LIST instruction or a STORE FACILITY LIST EXTENDED instruction. 
   
   
       12 . The computer program product according to  claim 1 , further comprising:
 obtaining for execution a STORE CLOCK FAST machine instruction, the STORE CLOCK FAST machine instruction being defined for computer execution according to a computer architecture, the STORE CLOCK FAST machine instruction comprising an opcode field, a field for identifying a base register (B 2 ) and a displacement field (D 2 );
 executing the obtained STORE CLOCK FAST machine instruction, the execution comprising: 
 1) arithmetically adding contents of the base register to the displacement field to determine a storage address; 
 2) obtaining the TOD clock value; and 
 3) storing the TOD clock value at the determined storage address. 
   
   
   
       13 . A system for executing instructions for storing a value of a time-of-day (TOD) clock, the system comprising:
 a storage for holding instructions and data;   one or more Central Processing Units for accessing the storage;   a TOD clock; and   a system clock for incrementing the TOD clock, the system capable of performing a method comprising:   obtaining a first instruction for execution by a Central Processing Unit (CPU) of one or more CPUs in the system; and   initiating execution of the obtained first instruction while the TOD clock is incrementing in a set state, the execution of the first instruction comprising 1) and 2):   1) obtaining a first TOD clock value; and   2) storing the first TOD clock value in storage;   obtaining a second instruction for execution by a CPU of the one or more CPUs in the system; and   subsequent to the initiating execution of the first instruction, initiating execution of the obtained second instruction while the TOD clock is incrementing in the set state, the execution of the second instruction comprising 3) through 5);   3) obtaining a second TOD clock value; and   4) responsive to both the first instruction and the second instruction being STORE CLOCK instructions, storing the second TOD clock value in storage wherein the second TOD clock value obtained while the TOD clock is incrementing in the set state is always different than the first TOD clock value obtained while the TOD clock is incrementing in the set state; and   5) responsive to the second instruction being a STORE CLOCK FAST instruction, storing the second TOD clock value in storage wherein the obtained second time TOD clock value is identical to the obtained first TOD clock value.   
   
   
       14 . The system according to  claim 13 , wherein each of the first TOD clock value and the second TOD clock value comprise two fields consisting of an incrementing field and a non-incrementing field, wherein the incrementing field comprising a least significant bit, wherein the non-incrementing field comprises a most significant bit, wherein the incrementing field is incremented based on a system clock, wherein the non-incrementing field is not incrementing, wherein the most significant bit of the incrementing field is more significant than the high order bit of the non-incrementing field further comprising:
 responsive to the second instruction being a STORE CLOCK instruction, the non-incrementing field comprising one or more non-zero value bits for ensuring that the second TOD clock value is unique; and   responsive to the second instruction being a STORE CLOCK FAST instruction, the non-incrementing field consisting of all zero value bits.   
   
   
       15 . The system according to  claim 14 , wherein the quality of the TOD clock value stored by an instruction is indicated by the setting of a condition code value in a condition code comprising:
 responsive to the TOD clock value being set, setting a condition code value of zero;   responsive to the TOD clock value being not set, setting a condition code value of one, wherein the TOD clock value indicates elapsed time since power to the clock was turned on; and   responsive to the TOD clock being in either a stopped state or a not-operational state, setting a condition code value of three.   
   
   
       16 . The system according to  claim 15 , wherein the non-incrementing field consists of zero value bits when the TOD clock for the system is stopped. 
   
   
       17 . The system according to  claim 13 , wherein the STORE CLOCK FAST instruction is provided by the STORE CLOCK FAST facility that is indicated as being installed on a CPU of the system by an indicator bit readable by any one of a STORE FACILITY LIST instruction or a STORE FACILITY LIST EXTENDED instruction. 
   
   
       18 . The system according to  claim 13 , further comprising:
 obtaining for execution a STORE CLOCK FAST machine instruction, the STORE CLOCK FAST machine instruction being defined for computer execution according to a computer architecture, the STORE CLOCK FAST machine instruction comprising an opcode field, a field for identifying a base register (B 2 ) and a displacement field (D 2 );
 executing the obtained STORE CLOCK FAST machine instruction, the execution comprising: 
 1) arithmetically adding contents of the base register to the displacement field to determine a storage address; 
 2) obtaining the TOD clock value; and 
 3) storing the TOD clock value at the determined storage address.