Inventor · disambiguated record
Rajendra D. Pendse
Also filed as: PENDSE RAJENDRA · PENDSE RAJENDRA D
146 granted patents·33 pending applications·2,118 citations·filing 1989–2025
99Inventor score
Files withPENDSE RAJENDRA D48STATS CHIPPAC LTD47META PLATFORMS TECH LLC23CHIPPAC INC22HEWLETT PACKARD CO8
Top patents by PatentIndex Score
179 records- 0198US8318537B2Flip chip interconnection having narrow interconnection sites on the substratePENDSE RAJENDRA D·Filed 2010·Granted Nov 27, 2012·49 cites·25 claims
- 0298US8193034B2Semiconductor device and method of forming vertical interconnect structure using stud bumpsPAGAILA REZA A·Filed 2009·Granted Jun 5, 2012·72 cites·20 claims
- 0398US8174119B2Semiconductor package with embedded diePENDSE RAJENDRA D·Filed 2006·Granted May 8, 2012·70 cites·25 claims
- 0498US7973406B2Bump-on-lead flip chip interconnectionSTATS CHIPPAC LTD·Filed 2010·Granted Jul 5, 2011·31 cites·23 claims
- 0597US7700407B2Method of forming a bump-on-lead flip chip interconnection having higher escape routing densitySTATS CHIPPAC LTD·Filed 2008·Granted Apr 20, 2010·32 cites·38 claims
- 0697US7608921B2Multi-layer semiconductor packageSTATS CHIPPAC INC·Filed 2006·Granted Oct 27, 2009·63 cites·24 claims
- 0797US7033859B2Flip chip interconnection structureCHIPPAC INC·Filed 2004·Granted Apr 25, 2006·85 cites·23 claims
- 0897US6815252B2Method of forming flip chip interconnection structureCHIPPAC INC·Filed 2001·Granted Nov 9, 2004·84 cites·25 claims
- 0996US8841779B2Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substratePENDSE RAJENDRA D·Filed 2010·Granted Sep 23, 2014·22 cites·26 claims
- 1096USRE44431EBump-on-lead flip chip interconnectionPENDSE RAJENDRA D·Filed 2012·Granted Aug 13, 2013·16 cites·23 claims
- 1196US8350384B2Semiconductor device and method of forming electrical interconnect with stress relief voidSTATS CHIPPAC LTD·Filed 2010·Granted Jan 8, 2013·29 cites·30 claims
- 1296US8026128B2Semiconductor device and method of self-confinement of conductive bump material during reflow without solder maskSTATS CHIPPAC LTD·Filed 2009·Granted Sep 27, 2011·33 cites·25 claims
- 1395US9881894B2Thin 3D fan-out embedded wafer level package (EWLB) for application processor and memory integrationSTATS CHIPPAC LTD·Filed 2013·Granted Jan 30, 2018·16 cites·15 claims
- 1495US7550680B2Package-on-package systemSTATS CHIPPAC LTD·Filed 2006·Granted Jun 23, 2009·30 cites·10 claims
- 1594US9922915B2Bump-on-lead flip chip interconnectionSTATS CHIPPAC LTD·Filed 2013·Granted Mar 20, 2018·10 cites·24 claims
- 1694US8129841B2Solder joint flip chip interconnectionPENDSE RAJENDRA D·Filed 2009·Granted Mar 6, 2012·29 cites·25 claims
- 1794US8076232B2Semiconductor device and method of forming composite bump-on-lead interconnectionPENDSE RAJENDRA D·Filed 2009·Granted Dec 13, 2011·28 cites·29 claims
- 1893US9159665B2Flip chip interconnection having narrow interconnection sites on the substrateSTATS CHIPPAC LTD·Filed 2012·Granted Oct 13, 2015·11 cites·27 claims
- 1993US9064858B2Semiconductor device and method of forming bump-on-lead interconnectionSTATS CHIPPAC LTD·Filed 2013·Granted Jun 23, 2015·12 cites·25 claims
- 2093US8525337B2Semiconductor device and method of forming stud bumps over embedded diePENDSE RAJENDRA D·Filed 2012·Granted Sep 3, 2013·12 cites·32 claims
- 2192US9754897B2Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuitsSTATS CHIPPAC LTD·Filed 2015·Granted Sep 5, 2017·8 cites·20 claims
- 2292US8143108B2Semiconductor device and method of dissipating heat from thin package-on-package mounted to substratePENDSE RAJENDRA D·Filed 2010·Granted Mar 27, 2012·14 cites·33 claims
- 2391US10388612B2Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuitsSTATS CHIPPAC PTE LTD·Filed 2017·Granted Aug 20, 2019·6 cites·21 claims
- 2491US8697490B2Flip chip interconnection structurePENDSE RAJENDRA D·Filed 2011·Granted Apr 15, 2014·7 cites·26 claims
- 2591US8476761B2Semiconductor device and method of confining conductive bump material during reflow with solder mask patchPENDSE RAJENDRA D·Filed 2012·Granted Jul 2, 2013·8 cites·25 claims
- 2691US8409920B2Integrated circuit package system for package stacking and method of manufacture thereforPENDSE RAJENDRA D·Filed 2008·Granted Apr 2, 2013·20 cites·10 claims
- 2791US8193035B2Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumpsPENDSE RAJENDRA D·Filed 2010·Granted Jun 5, 2012·10 cites·25 claims
- 2891US7994626B2Multi-layer semiconductor package with vertical connectors and method of manufacture thereofSTATS CHIPPAC INC·Filed 2009·Granted Aug 9, 2011·18 cites·34 claims
- 2991US6940178B2Self-coplanarity bumping shape for flip chipCHIPPAC INC·Filed 2002·Granted Sep 6, 2005·51 cites·13 claims
- 3091US5764486ACost effective structure and method for interconnecting a flip chip with a substrateHEWLETT PACKARD CO·Filed 1996·Granted Jun 9, 1998·129 cites·7 claims
- 3190US9385074B2Semiconductor package with embedded dieSTATS CHIPPAC LTD·Filed 2013·Granted Jul 5, 2016·7 cites·26 claims
- 3290US8278144B2Flip chip interconnect solder maskPENDSE RAJENDRA D·Filed 2009·Granted Oct 2, 2012·13 cites·23 claims
- 3390US7034391B2Flip chip interconnection pad layoutCHIPPAC INC·Filed 2004·Granted Apr 25, 2006·40 cites·16 claims
- 3490US6059894AHigh temperature flip chip joining flux that obviates the cleaning processHEWLETT PACKARD CO·Filed 1998·Granted May 9, 2000·63 cites·12 claims
- 3590US5528462ADirect chip connection using demountable flip chip packageFiled 1994·Granted Jun 18, 1996·117 cites·15 claims
- 3689US11550158B2Artificial reality system having system-on-a-chip (SoC) integrated circuit components including stacked SRAMMETA PLATFORMS TECH LLC·Filed 2020·Granted Jan 10, 2023·2 cites·32 claims
- 3789US11508700B2Left and right projectors for display deviceMETA PLATFORMS TECH LLC·Filed 2020·Granted Nov 22, 2022·2 cites·18 claims
- 3889US11362251B2Managing thermal resistance and planarity of a display packageFACEBOOK TECH LLC·Filed 2020·Granted Jun 14, 2022·2 cites·22 claims
- 3989US9780057B2Semiconductor device and method of forming pad layout for flipchip semiconductor dieSTATS CHIPPAC LTD·Filed 2014·Granted Oct 3, 2017·8 cites·25 claims
- 4089US8810029B2Solder joint flip chip interconnectionPENDSE RAJENDRA D·Filed 2012·Granted Aug 19, 2014·8 cites·49 claims
- 4189US8574959B2Semiconductor device and method of forming bump-on-lead interconnectionPENDSE RAJENDRA D·Filed 2010·Granted Nov 5, 2013·8 cites·61 claims
- 4289US6780682B2Process for precise encapsulation of flip chip interconnectsCHIPPAC INC·Filed 2002·Granted Aug 24, 2004·42 cites·9 claims
- 4388US12355022B2Display projector systems and devices for augmented-realityMETA PLATFORMS TECH LLC·Filed 2024·Granted Jul 8, 2025·0 cites·20 claims
- 4488US9472533B2Semiconductor device and method of forming wire bondable fan-out EWLB packageSTATS CHIPPAC LTD·Filed 2014·Granted Oct 18, 2016·8 cites·23 claims
- 4587US10002857B2Package on package (PoP) device comprising thermal interface material (TIM) in cavity of an encapsulation layerQUALCOMM INC·Filed 2016·Granted Jun 19, 2018·10 cites·34 claims
- 4687US9385101B2Semiconductor device and method of forming bump-on-lead interconnectionSTATS CHIPPAC LTD·Filed 2015·Granted Jul 5, 2016·4 cites·23 claims
- 4787US8435834B2Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in FO-WLCSPPAGAILA REZA A·Filed 2010·Granted May 7, 2013·8 cites·15 claims
- 4887US7723225B2Solder bump confinement system for an integrated circuit packageSTATS CHIPPAC LTD·Filed 2007·Granted May 25, 2010·13 cites·10 claims
- 4987US7713782B2Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud-bumpsSTATS CHIPPAC INC·Filed 2006·Granted May 11, 2010·12 cites·17 claims
- 5087US7368817B2Bump-on-lead flip chip interconnectionCHIPPAC INC·Filed 2004·Granted May 6, 2008·24 cites·46 claims
Showing the top 50 of 179 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →