Inventor · disambiguated record
Farshad Ghahghahi
Also filed as: GHAHGHAHI FARSHAD
23 granted patents·1 pending application·460 citations·filing 1997–2024
95Inventor score
Top patents by PatentIndex Score
24 records- 0193US11955447B2Semiconductor chip having stepped conductive pillarsADVANCED MICRO DEVICES INC·Filed 2021·Granted Apr 9, 2024·2 cites·20 claims
- 0292US6114761AThermally-enhanced flip chip IC package with extruded heatspreaderLSI LOGIC CORP·Filed 1998·Granted Sep 5, 2000·152 cites·10 claims
- 0388US6150729ARouting density enhancement for semiconductor BGA packages and printed wiring boardsLSI LOGIC CORP·Filed 1999·Granted Nov 21, 2000·72 cites·11 claims
- 0486US7081672B1Substrate via layout to improve bias humidity testing reliabilityLSI LOGIC CORP·Filed 2005·Granted Jul 25, 2006·15 cites·19 claims
- 0586US6531932B1Microstrip package having optimized signal line impedance controlLSI LOGIC CORP·Filed 2001·Granted Mar 11, 2003·23 cites·10 claims
- 0685US6762366B1Ball assignment for ball grid array packageLSI LOGIC CORP·Filed 2001·Granted Jul 13, 2004·39 cites·18 claims
- 0784US6671865B1High density input outputLSI LOGIC CORP·Filed 2001·Granted Dec 30, 2003·41 cites·20 claims
- 0880US6407462B1Irregular grid bond pad layout arrangement for a flip chip packageLSI LOGIC CORP·Filed 2000·Granted Jun 18, 2002·36 cites·13 claims
- 0979US10672712B2Multi-RDL structure packages and methods of fabricating the sameBHAGAVAT MILIND S·Filed 2018·Granted Jun 2, 2020·2 cites·21 claims
- 1076US12417994B2Semiconductor chip having stepped conductive pillarsADVANCED MICRO DEVICES INC·Filed 2024·Granted Sep 16, 2025·0 cites·17 claims
- 1166US6115910AMisregistration fidutialLSI LOGIC CORP·Filed 1997·Granted Sep 12, 2000·27 cites·7 claims
- 1265US7405946B2Ball grid array assignmentLSI LOGIC CORP·Filed 2005·Granted Jul 29, 2008·3 cites·18 claims
- 1364US10903168B2Multi-RDL structure packages and methods of fabricating the sameADVANCED MICRO DEVICES INC·Filed 2020·Granted Jan 26, 2021·0 cites·20 claims
- 1463US6459049B1High density signal routingLSI LOGIC CORP·Filed 2001·Granted Oct 1, 2002·14 cites·16 claims
- 1561US6479319B1Contact escape patternLSI LOGIC CORP·Filed 2001·Granted Nov 12, 2002·11 cites·5 claims
- 1658US7051434B2Designing a ball assignment for a ball grid array packageLSI LOGIC CORP·Filed 2003·Granted May 30, 2006·7 cites·9 claims
- 1756US6946866B2Measurement of package interconnect impedance using tester and supporting testerLSI LOGIC CORP·Filed 2003·Granted Sep 20, 2005·7 cites·13 claims
- 1853US11315883B2Integrated circuit product customizations for identification code visibilityADVANCED MICRO DEVICES INC·Filed 2019·Granted Apr 26, 2022·0 cites·21 claims
- 1952US12482683B2Carrier boat for die package flux cleaningADVANCED MICRO DEVICES INC·Filed 2021·Granted Nov 25, 2025·0 cites·20 claims
- 2052US7105926B2Routing scheme for differential pairs in flip chip substratesLSI LOGIC CORP·Filed 2003·Granted Sep 12, 2006·5 cites·32 claims
- 2150US2025157946A1Apparatus, system, and method for mitigating warpage in integrated circuit packagesADVANCED MICRO DEVICES INC·Filed 2022·Application pending·0 cites
- 2248US7345245B2Robust high density substrate design for thermal cycling reliabilityLSI LOGIC CORP·Filed 2003·Granted Mar 18, 2008·3 cites·12 claims
- 2343US6825066B2Stiffener designLSI LOGIC CORP·Filed 2002·Granted Nov 30, 2004·1 cites·20 claims
- 2441US7319272B2Ball assignment systemLSI LOGIC CORP·Filed 2005·Granted Jan 15, 2008·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →