Inventor · disambiguated record
Minghsing Tsai
Also filed as: TSAI MINGHSING
33 granted patents·8 pending applications·168 citations·filing 2001–2020
96Inventor score
Files withTAIWAN SEMICONDUCTOR MFG23TAIWAN SEMICONDUCTOR MFG CO LTD8LEE HSIEN MING2SHIH CHIEN-HSUEH2CHEN CHUN-HONG1
Top patents by PatentIndex Score
41 records- 0194US10714383B2Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jul 14, 2020·6 cites·20 claims
- 0291US7538434B2Copper interconnection with conductive polymer layer and method of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted May 26, 2009·24 cites·23 claims
- 0390US11535950B2Electro-plating and apparatus for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 27, 2022·1 cites·20 claims
- 0490US9518334B2Electro-plating and apparatus for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Dec 13, 2016·3 cites·19 claims
- 0588US9892960B2Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Feb 13, 2018·4 cites·20 claims
- 0687US6872627B2Selective formation of metal gate for dual gate oxide applicationTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Mar 29, 2005·41 cites·22 claims
- 0786US9401329B2Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Jul 26, 2016·5 cites·19 claims
- 0884US8193087B2Process for improving copper line cap formationSHIH CHIEN-HSUEH·Filed 2006·Granted Jun 5, 2012·10 cites·11 claims
- 0983US10290538B2Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted May 14, 2019·2 cites·20 claims
- 1083US9029260B2Gap filling method for dual damascene processLIN CHUN CHIEH·Filed 2011·Granted May 12, 2015·6 cites·20 claims
- 1183US7423347B2In-situ deposition for cu hillock suppressionTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Sep 9, 2008·7 cites·14 claims
- 1279US8623760B2Process for improving copper line cap formationSHIH CHIEN-HSUEH·Filed 2012·Granted Jan 7, 2014·4 cites·16 claims
- 1377US8322299B2Cluster processing apparatus for metallization processing in semiconductor manufacturingYU CHEN-HUA·Filed 2006·Granted Dec 4, 2012·5 cites·22 claims
- 1476US8975187B2Stress-controlled formation of tin hard maskTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Mar 10, 2015·2 cites·20 claims
- 1576US7446047B2Metal structure with sidewall passivation and methodTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Nov 4, 2008·5 cites·13 claims
- 1674US7413976B2Uniform passivation method for conductive featuresTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Aug 19, 2008·4 cites·30 claims
- 1773US9214383B2Method of semiconductor integrated circuit fabricationTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Dec 15, 2015·3 cites·20 claims
- 1872US10985054B2Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Apr 20, 2021·0 cites·20 claims
- 1972US7259463B2Damascene interconnect structure with cap layerTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Aug 21, 2007·20 cites·9 claims
- 2070US10508356B2Electro-plating and apparatus for performing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 17, 2019·0 cites·20 claims
- 2166US7332435B2Silicide structure for ultra-shallow junction for MOS devicesTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Feb 19, 2008·3 cites·18 claims
- 2264US8962484B2Method of forming pattern for semiconductor deviceLEE CHIA YING·Filed 2011·Granted Feb 24, 2015·1 cites·20 claims
- 2364US7659198B2In-situ deposition for Cu hillock suppressionTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Feb 9, 2010·1 cites·20 claims
- 2462US8980745B1Interconnect structures and methods of forming sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Mar 17, 2015·1 cites·20 claims
- 2559US7483258B2MIM capacitor in a copper damascene interconnectTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Jan 27, 2009·1 cites·7 claims
- 2657US6555474B1Method of forming a protective layer included in metal filled semiconductor featuresTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Apr 29, 2003·7 cites·20 claims
- 2754US9142450B2Interconnect structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 22, 2015·0 cites·20 claims
- 2853US2008057211A1Methods for plating and fabrication apparatus thereofTAIWAN SEMICONDUCTOR MFG·Filed 2006·Application pending·0 cites
- 2953US2014262800A1Electroplating Chemical LevelerTAIWAN SEMICONDUCTOR MFG·Filed 2013·Application pending·0 cites
- 3052US8563391B2Method for forming MIM capacitor in a copper damascene interconnectCHEN CHUN-HONG·Filed 2008·Granted Oct 22, 2013·0 cites·13 claims
- 3149US6995089B2Method to remove copper without pattern density effectTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Feb 7, 2006·2 cites·40 claims
- 3248US8759975B2Approach for reducing copper line resistivityLEE HSIEN-MING·Filed 2012·Granted Jun 24, 2014·0 cites·11 claims
- 3347US2005199507A1Chemical structures and compositions of ECP additives to reduce pit defectsTAIWAN SEMICONDUCTOR MFG·Filed 2004·Application pending·0 cites
- 3445US8242016B2Approach for reducing copper line resistivityLEE HSIEN-MING·Filed 2007·Granted Aug 14, 2012·0 cites·9 claims
- 3542US8692351B2Dummy shoulder structure for line stress reductionKUO CHENG CHENG·Filed 2010·Granted Apr 8, 2014·0 cites·20 claims
- 3641US7771579B2Electro chemical plating additives for improving stress and leveling effectTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Aug 10, 2010·0 cites·18 claims
- 3740US2006091551A1Differentially metal doped copper damascenesTAIWAN SEMICONDUCTOR MFG·Filed 2004·Application pending·0 cites
- 3839US2005211564A1Method and composition to enhance wetting of ECP electrolyte to copper seedTAIWAN SEMICONDUCTOR MFG·Filed 2004·Application pending·0 cites
- 3938US2005045485A1Method to improve copper electrochemical depositionTAIWAN SEMICONDUCTOR MFG·Filed 2003·Application pending·0 cites
- 4037US2003168345A1In-situ monitor seed for copper platingTAIWAN SEMICONDUCTOR MFG·Filed 2002·Application pending·0 cites
- 4135US2006138668A1Passivation structure for semiconductor devicesSU HUNG-WEN·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →