Inventor · disambiguated record
Chen Koren
Also filed as: KOREN CHEN
12 granted patents·3 pending applications·84 citations·filing 2008–2024
89Inventor score
Top patents by PatentIndex Score
15 records- 0198US11847185B2Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elementsINTEL CORP·Filed 2021·Granted Dec 19, 2023·7 cites·21 claims
- 0295US10620951B2Matrix multiplication acceleration of sparse matrices using column folding and squeezingINTEL CORP·Filed 2018·Granted Apr 14, 2020·35 cites·20 claims
- 0393US10929503B2Apparatus and method for a masked multiply instruction to support neural network pruning operationsINTEL CORP·Filed 2018·Granted Feb 23, 2021·19 cites·27 claims
- 0491US12287843B2Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elementsINTEL CORP·Filed 2023·Granted Apr 29, 2025·1 cites·20 claims
- 0575US9448879B2Apparatus and method for implement a multi-level memory hierarchyYIGZAW THEODROS·Filed 2011·Granted Sep 20, 2016·4 cites·24 claims
- 0671US8782374B2Method and apparatus for inclusion of TLB entries in a micro-op cache of a processorRAPPOPORT LIHU·Filed 2008·Granted Jul 15, 2014·6 cites·20 claims
- 0771US8433850B2Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processorRAPPOPORT LIHU·Filed 2008·Granted Apr 30, 2013·6 cites·20 claims
- 0867US8127085B2Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processorRAPPOPORT LIHU·Filed 2008·Granted Feb 28, 2012·4 cites·16 claims
- 0961US9348591B2Multi-level tracking of in-use state of cache linesKIM ILHYUN·Filed 2011·Granted May 24, 2016·2 cites·14 claims
- 1061US2025292354A1Systolic array matrix accelerator for graphics processing unit applicationsINTEL CORP·Filed 2024·Application pending·0 cites
- 1160US2020210517A1Systems and methods to accelerate multiplication of sparse matricesINTEL CORP·Filed 2018·Application pending·0 cites
- 1258US2025291590A1Gpu asynchronous matrix multiply accumulate applicationsINTEL CORP·Filed 2024·Application pending·0 cites
- 1352US11513893B2Concurrent compute and ECC for in-memory matrix vector operationsINTEL CORP·Filed 2020·Granted Nov 29, 2022·0 cites·21 claims
- 1451US11450672B2Ultra-deep compute static random access memory with high compute throughput and multi-directional data propagationINTEL CORP·Filed 2020·Granted Sep 20, 2022·0 cites·18 claims
- 1551US10509846B2Accelerator for processing dataINTEL CORP·Filed 2017·Granted Dec 17, 2019·0 cites·25 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →