Assignee
KIM ILHYUN
US·2 granted patents·1 pending application·2 citations·filing 2006–2011
Technology mixG06F3
Top patents by PatentIndex Score
3 records- 0161US9348591B2Multi-level tracking of in-use state of cache linesKIM ILHYUN·Filed 2011·Granted May 24, 2016·2 cites·14 claims
- 0240US2008065865A1In-use bits for efficient instruction fetch operationsKIM ILHYUN·Filed 2006·Application pending·0 cites
- 0338US9158696B2Hiding instruction cache miss latency by running tag lookups ahead of the instruction accessesKIM ILHYUN·Filed 2011·Granted Oct 13, 2015·0 cites·21 claims
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