Inventor · disambiguated record
Yaw Wen Hu
Also filed as: HU YAW W · HU YAW-WEN
27 granted patents·13 pending applications·594 citations·filing 1981–2018
96Inventor score
Top patents by PatentIndex Score
40 records- 0197US7927994B1Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturingSILICON STORAGE TECH INC·Filed 2010·Granted Apr 19, 2011·73 cites·6 claims
- 0297US7868375B2Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturingSILICON STORAGE TECH INC·Filed 2009·Granted Jan 11, 2011·230 cites·2 claims
- 0394US6952034B2Semiconductor memory array of floating gate memory cells with buried source line and floating gateSILICON STORAGE TECH INC·Filed 2003·Granted Oct 4, 2005·64 cites·22 claims
- 0493US9018733B1Capacitor, storage node of the capacitor, and method of forming the sameINOTERA MEMORIES INC·Filed 2014·Granted Apr 28, 2015·15 cites·11 claims
- 0591US9171847B1Semiconductor structureINOTERA MEMORIES INC·Filed 2014·Granted Oct 27, 2015·11 cites·10 claims
- 0690US8461640B2FIN-FET non-volatile memory cell, and an array and method of manufacturingHU YAW WEN·Filed 2009·Granted Jun 11, 2013·29 cites·12 claims
- 0787US7668013B2Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratioSILICON STORAGE TECH INC·Filed 2008·Granted Feb 23, 2010·17 cites·8 claims
- 0885US6891220B2Method of programming electrons onto a floating gate of a non-volatile memory cellSILICON STORAGE TECH INC·Filed 2004·Granted May 10, 2005·30 cites·5 claims
- 0976US6429075B2Method of self-aligning a floating gate to a control gate and to an isolation in an electrically erasable and programmable memory cell, and a cell made therebySILICON STORAGE TECH INC·Filed 2001·Granted Aug 6, 2002·19 cites·10 claims
- 1073US4374915AHigh contrast alignment marker for integrated circuit fabricationINTEL CORP·Filed 1981·Granted Feb 22, 1983·29 cites·5 claims
- 1167US4744859AProcess for fabricating lightly doped drain MOS devicesVITELIC CORP·Filed 1986·Granted May 17, 1988·40 cites·16 claims
- 1266US9070782B2Semiconductor structureINOTERA MEMORIES INC·Filed 2013·Granted Jun 30, 2015·2 cites·10 claims
- 1366US7537996B2Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried source line and floating gateSILICON STORAGE TECH INC·Filed 2005·Granted May 26, 2009·2 cites·19 claims
- 1464US9230967B2Method for forming self-aligned isolation trenches in semiconductor substrate and semiconductor deviceINOTERA MEMORIES INC·Filed 2014·Granted Jan 5, 2016·1 cites·3 claims
- 1563US9184166B2Manufacturing method of capacitor structure and semiconductor device using the sameINOTERA MEMORIES INC·Filed 2014·Granted Nov 10, 2015·1 cites·5 claims
- 1663US7547603B2Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making sameSILICON STORAGE TECH INC·Filed 2006·Granted Jun 16, 2009·2 cites·11 claims
- 1759US7129536B2Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making sameSILICON STORAGE TECH INC·Filed 2004·Granted Oct 31, 2006·7 cites·24 claims
- 1857US7119396B2NROM deviceSILICON STORAGE TECH INC·Filed 2004·Granted Oct 10, 2006·7 cites·4 claims
- 1955US11062984B2Methods for forming semiconductor devicesMICRON TECHNOLOGY INC·Filed 2018·Granted Jul 13, 2021·0 cites·19 claims
- 2054US7974136B2Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratioSILICON STORAGE TECH INC·Filed 2009·Granted Jul 5, 2011·2 cites·8 claims
- 2149US10121734B2Semiconductor deviceMICRON TECHNOLOGY INC·Filed 2016·Granted Nov 6, 2018·0 cites·20 claims
- 2249US6369420B1Method of self-aligning a floating gate to a control gate and to an isolation in an electrically erasable and programmable memory cell, and a cell made therebySILICON STORAGE TECH INC·Filed 1998·Granted Apr 9, 2002·10 cites·13 claims
- 2349US2009039410A1Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of ManufacturingLIU XIAN·Filed 2007·Application pending·0 cites
- 2448US6822287B1Array of integrated circuit units with strapping lines to prevent punch throughSILICON STORAGE TECH INC·Filed 2003·Granted Nov 23, 2004·3 cites·23 claims
- 2547US2011127599A1Split Gate Non-volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of ManufacturingLIU XIAN·Filed 2011·Application pending·0 cites
- 2646US2016104782A1Transistor structure and method of manufacturing the sameINOTERA MEMORIES INC·Filed 2014·Application pending·0 cites
- 2746US2015294972A1Semiconductor deviceINOTERA MEMORIES INC·Filed 2015·Application pending·0 cites
- 2844US9070740B2Memory unit, memory unit array and method of manufacturing the sameINOTERA MEMORIES INC·Filed 2013·Granted Jun 30, 2015·0 cites·10 claims
- 2944US2014308807A1Method for fabricating a semiconductor memoryINOTERA MEMORIES INC·Filed 2014·Application pending·0 cites
- 3044US2015348871A1Semiconductor device and method for manufacturing the sameINOTERA MEMORIES INC·Filed 2014·Application pending·0 cites
- 3143US2015076666A1Semiconductor device having through-silicon viaINOTERA MEMORIES INC·Filed 2013·Application pending·0 cites
- 3243US2015243597A1Semiconductor device capable of suppressing warpingINOTERA MEMORIES INC·Filed 2014·Application pending·0 cites
- 3341US9035366B2Semiconductor device and manufacturing method thereforINOTERA MEMORIES INC·Filed 2013·Granted May 19, 2015·0 cites·10 claims
- 3441US2014291754A1Semiconductor structure having buried word line and method of manufacturing the sameINOTERA MEMORIES INC·Filed 2013·Application pending·0 cites
- 3541US2009309182A1Electrostatic discharge protection structureSU KUNG-YEN·Filed 2008·Application pending·0 cites
- 3640US9496358B2Semiconductor device and fabrication method thereforINOTERA MEMORIES INC·Filed 2014·Granted Nov 15, 2016·0 cites·5 claims
- 3740US2014252550A1Stack capacitor structure and manufacturing method thereofINOTERA MEMORIES INC·Filed 2013·Application pending·0 cites
- 3837US2007210369A1Single gate-non-volatile flash memory cellCHEN BOMY·Filed 2006·Application pending·0 cites
- 3936US8828843B2Method of manufacturing isolation structureINOTERA MEMORIES INC·Filed 2013·Granted Sep 9, 2014·0 cites·8 claims
- 4034US2017012028A1Recoverable device for memory base productINOTERA MEMORIES INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →