Inventor · disambiguated record
Jiunn-Ren Hwang
Also filed as: HWANG JIUNN-REN
36 granted patents·15 pending applications·484 citations·filing 1999–2013
97Inventor score
Files withUNITED MICROELECTRONICS CORP23TAIWAN SEMICONDUCTOR MFG11LEE TZYH-CHEANG3HWANG JENG-HUEY2LIU ALEX LIU YI-CHENG1
Top patents by PatentIndex Score
51 records- 0197US7176084B2Self-aligned conductive spacer process for sidewall control gate of high-speed random access memoryTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Feb 13, 2007·66 cites·18 claims
- 0296US6580135B2Silicon nitride read only memory structure and method of programming and erasureMACRONIX INT CO LTD·Filed 2002·Granted Jun 17, 2003·140 cites·6 claims
- 0395US7482236B2Structure and method for a sidewall SONOS memory deviceTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Jan 27, 2009·39 cites·20 claims
- 0490US8772056B2Dummy pattern design for thermal annealingTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jul 8, 2014·8 cites·20 claims
- 0587US6853031B2Structure of a trapezoid-triple-gate FETUNITED MICROELECTRONICS CORP·Filed 2003·Granted Feb 8, 2005·41 cites·13 claims
- 0684US6664028B2Method of forming opening in wafer layerUNITED MICROELECTRONICS CORP·Filed 2000·Granted Dec 16, 2003·24 cites·20 claims
- 0782US7589387B2SONOS type two-bit FinFET flash memory cellTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Sep 15, 2009·10 cites·14 claims
- 0882US7186657B2Method for patterning HfO2-containing dielectricUNITED MICROELECTRONICS CORP·Filed 2005·Granted Mar 6, 2007·6 cites·9 claims
- 0975US7326622B2Method of manufacturing semiconductor MOS transistor deviceUNITED MICROELECTRONICS CORP·Filed 2005·Granted Feb 5, 2008·4 cites·8 claims
- 1075US6589881B2Method of forming dual damascene structureUNITED MICROELECTRONICS CORP·Filed 2001·Granted Jul 8, 2003·23 cites·15 claims
- 1173US7482231B2Manufacturing of memory array and peripheryTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Jan 27, 2009·5 cites·20 claims
- 1273US6839126B2Photolithography process with multiple exposuresUNITED MICROELECTRONICS CORP·Filed 2002·Granted Jan 4, 2005·13 cites·29 claims
- 1373US6337269B1Method of fabricating a dual damascene structureUNITED MICROELECTRONICS CORP·Filed 2001·Granted Jan 8, 2002·22 cites·18 claims
- 1471US8618610B2Dummy pattern design for thermal annealingWANG LI-TING·Filed 2009·Granted Dec 31, 2013·3 cites·15 claims
- 1570US6613485B2Optical proximity correction of pattern on photoresist through spacing of sub patternsUNITED MICROELECTRONICS CROP·Filed 2002·Granted Sep 2, 2003·10 cites·26 claims
- 1668US6391757B1Dual damascene processUNITED MICROELECTRONICS CORP·Filed 2001·Granted May 21, 2002·17 cites·12 claims
- 1767US7714376B2Non-volatile memory device with polysilicon spacer and method of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted May 11, 2010·3 cites·13 claims
- 1866US7405119B2Structure and method for a sidewall SONOS memory deviceTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Jul 29, 2008·3 cites·20 claims
- 1963US7663134B2Memory array with a selector connected to multiple resistive cellsTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Feb 16, 2010·4 cites·19 claims
- 2063US7297450B2Optical proximity correction methodUNITED MICROELECTRONICS CORP·Filed 2006·Granted Nov 20, 2007·1 cites·28 claims
- 2163US6579790B1Dual damascene manufacturing processUNITED MICROELECTRONICS CORP·Filed 2000·Granted Jun 17, 2003·8 cites·23 claims
- 2261US6638664B2Optical mask correction methodUNITED MICROELECTRONICS CORP·Filed 2001·Granted Oct 28, 2003·7 cites·7 claims
- 2359US6974650B2Method of correcting a mask layoutUNITED MICROELECTRONICS CORP·Filed 2002·Granted Dec 13, 2005·6 cites·17 claims
- 2454US6680163B2Method of forming opening in wafer layerUNITED MICROELECTRONICS CORP·Filed 2002·Granted Jan 20, 2004·3 cites·16 claims
- 2553US2007117304A1Method for patterning hfo2-containing dielectricHWANG JENG-HUEY·Filed 2007·Application pending·0 cites
- 2652US6316340B1Photolithographic process for preventing corner roundingUNITED MICROELECTRONICS CORP·Filed 2000·Granted Nov 13, 2001·3 cites·15 claims
- 2751US8653576B2Method of fabricating a SONOS gate structure with dual-thickness oxideLEE TZYH-CHEANG·Filed 2009·Granted Feb 18, 2014·0 cites·8 claims
- 2851US7063923B2Optical proximity correction methodUNITED MICROELECTRONICS CORP·Filed 2004·Granted Jun 20, 2006·2 cites·14 claims
- 2949US6656667B2Multiple resist layer photolithographic processUNITED MICROELECTRONICS CORP·Filed 2001·Granted Dec 2, 2003·2 cites·8 claims
- 3047US2007170500A1Semiconductor structure and method for forming thereofUNITED MICROELECTRONICS CORP·Filed 2007·Application pending·0 cites
- 3146US6380077B1Method of forming contact openingUNITED MICROELECTRONICS CORP·Filed 2001·Granted Apr 30, 2002·1 cites·18 claims
- 3246US2007096200A1Self-aligned conductive spacer process for sidewall control gate of high-speed random access memoryLEE TZYH-CHEANG·Filed 2006·Application pending·0 cites
- 3345US2007075385A1Sidewall SONOS gate structure with dual-thickness oxide and method of fabricating the sameTAIWAN SEMICONDUCTOR MFG·Filed 2005·Application pending·0 cites
- 3444US2006019451A1Method for patterning hfo2-containing dielectricHWANG JENG-HUEY·Filed 2004·Application pending·0 cites
- 3544US2007090491A1Semiconductor structure with silicon on insulatorUNITED MICROELECTRONICS CORP·Filed 2006·Application pending·0 cites
- 3644US2006286730A1Semiconductor structure and method for forming thereofLIU ALEX LIU YI-CHENG·Filed 2005·Application pending·0 cites
- 3743US2006099763A1Method of manufacturing semiconductor mos transistor deviceLIU YI-CHENG·Filed 2004·Application pending·0 cites
- 3842US7355236B2Non-volatile floating gate memory cells with polysilicon storage dots and fabrication methods thereofTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Apr 8, 2008·0 cites·5 claims
- 3941US2004194050A1Optical proximity correction methodFiled 2004·Application pending·0 cites
- 4040US7847335B2Non-volatile memory device having a generally L-shaped cross-section sidewall SONOSTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Dec 7, 2010·0 cites·10 claims
- 4139US8173990B2Memory array with a selector connected to multiple resistive cellsLEE TZYH-CHEANG·Filed 2010·Granted May 8, 2012·0 cites·10 claims
- 4239US2004009409A1Optical proximity correction methodFiled 2002·Application pending·0 cites
- 4338US6767679B2Correcting the polygon feature pattern with an optical proximity correction methodUNITED MICROELECTRONICS CORP·Filed 2002·Granted Jul 27, 2004·3 cites·5 claims
- 4437US6541782B2Electron beam photolithographic processUNITED MICROELECTRONICS COPR·Filed 2000·Granted Apr 1, 2003·0 cites·6 claims
- 4537US6312855B1Three-phase phase shift maskUNITED MICROELECTRONICS CORP·Filed 1999·Granted Nov 6, 2001·4 cites·11 claims
- 4637US2004195622A1Semiconductor structure with silicon on insulatorUNITED MICROELECTRONICS CORP·Filed 2003·Application pending·0 cites
- 4736US2002182549A1Alternate exposure method for improving photolithography resolutionFiled 2001·Application pending·0 cites
- 4835US6429425B1Method for forming a calibation standard to adjust a micro-bar of an electron microscopeUNITED MICROELECTRONICS CORP·Filed 1999·Granted Aug 6, 2002·3 cites·7 claims
- 4935US2002187629A1Method for dual damascene process without using gap-filling materialsFiled 2001·Application pending·0 cites
- 5035US2002168590A1Method of forming storage nodes in a DRAMFiled 2001·Application pending·0 cites
Showing the top 50 of 51 patent records by PatentIndex Score.
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