Inventor · disambiguated record
Sanjay R. Parihar
Also filed as: PARIHAR SANJAY · PARIHAR SANJAY R · PARIHAR SANJAY RAJ
7 granted patents·2 pending applications·54 citations·filing 2010–2023
82Inventor score
Files withGLOBALFOUNDRIES INC2GLOBALFOUNDRIES US INC2BADRUDDUZA SAYEED A1FREESCALE SEMICONDUCTOR INC1JALLEPALLI SRINIVAS1
Top patents by PatentIndex Score
9 records- 0191US9799393B1Methods, apparatus and system for providing NMOS-only memory cellsGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 24, 2017·10 cites·16 claims
- 0285US8183639B2Dual port static random access memory cell layoutMALINGE PIERRE·Filed 2010·Granted May 22, 2012·14 cites·19 claims
- 0384US8806418B1Scaled sigma samplingJALLEPALLI SRINIVAS·Filed 2013·Granted Aug 12, 2014·17 cites·20 claims
- 0484US8638592B2Dual port static random access memory cellBADRUDDUZA SAYEED A·Filed 2011·Granted Jan 28, 2014·10 cites·16 claims
- 0577US11037937B2SRAM bit cells formed with dummy structuresGLOBALFOUNDRIES US INC·Filed 2019·Granted Jun 15, 2021·2 cites·17 claims
- 0663US12272299B1Compact memory-in-pixel display structureGLOBALFOUNDRIES US INC·Filed 2023·Granted Apr 8, 2025·0 cites·20 claims
- 0762US8856705B2Mismatch verification device and methods thereofSHROFF MEHUL D·Filed 2012·Granted Oct 7, 2014·1 cites·20 claims
- 0848US2018012647A1Methods, apparatus and system for providing nmos-only memory cellsGLOBALFOUNDRIES INC·Filed 2017·Application pending·0 cites
- 0947US2016171140A1Method and system for determining minimum operational voltage for transistor memory-based devicesFREESCALE SEMICONDUCTOR INC·Filed 2014·Application pending·0 cites
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