Inventor · disambiguated record
Frederick R. Dahilig
Also filed as: DAHILIG FREDERICK · DAHILIG FREDERICK R · DAHILIG FREDERICK RODRIGUEZ
19 granted patents·3 pending applications·126 citations·filing 2005–2016
94Inventor score
Files withCAMACHO ZIGMUND R6STATS CHIPPAC LTD6DAHILIG FREDERICK RODRIGUEZ4CAMACHO ZIGMUND RAMIREZ2BATHAN HENRY DESCALZO1
Top patents by PatentIndex Score
22 records- 0194US8884418B2Semiconductor device and method of forming PIP with inner known good die interconnected with conductive bumpsCAMACHO ZIGMUND R·Filed 2012·Granted Nov 11, 2014·15 cites·25 claims
- 0291US7830020B2Integrated circuit package system employing device stackingSTATS CHIPPAC LTD·Filed 2007·Granted Nov 9, 2010·19 cites·15 claims
- 0389US8405230B2Semiconductor flip chip package having substantially non-collapsible spacer and method of manufacture thereofLEE JAE SOO·Filed 2011·Granted Mar 26, 2013·11 cites·21 claims
- 0489US7880313B2Semiconductor flip chip package having substantially non-collapsible spacerCHIPPAC INC·Filed 2005·Granted Feb 1, 2011·17 cites·6 claims
- 0586US8105915B2Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layersCAMACHO ZIGMUND R·Filed 2009·Granted Jan 31, 2012·12 cites·25 claims
- 0683US8022539B2Integrated circuit packaging system with increased connectivity and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2008·Granted Sep 20, 2011·9 cites·7 claims
- 0782US8241954B2Wafer level die integration and methodCAMACHO ZIGMUND R·Filed 2007·Granted Aug 14, 2012·9 cites·24 claims
- 0881US8283209B2Semiconductor device and method of forming PiP with inner known good die interconnected with conductive bumpsCAMACHO ZIGMUND R·Filed 2009·Granted Oct 9, 2012·7 cites·25 claims
- 0980US8344495B2Integrated circuit packaging system with interconnect and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2009·Granted Jan 1, 2013·9 cites·18 claims
- 1079US9142514B2Semiconductor device and method of forming wafer level die integrationCAMACHO ZIGMUND R·Filed 2012·Granted Sep 22, 2015·4 cites·20 claims
- 1177US8810015B2Integrated circuit packaging system with high lead count and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2009·Granted Aug 19, 2014·7 cites·18 claims
- 1276US8518749B2Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor dieDAHILIG FREDERICK R·Filed 2009·Granted Aug 27, 2013·5 cites·27 claims
- 1359US8120187B2Integrated circuit package system employing device stacking and method of manufacture thereofDAHILIG FREDERICK RODRIGUEZ·Filed 2010·Granted Feb 21, 2012·1 cites·15 claims
- 1458US8174127B2Integrated circuit package system employing device stackingDAHILIG FREDERICK RODRIGUEZ·Filed 2011·Granted May 8, 2012·1 cites·20 claims
- 1557US9666540B2Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor dieSTATS CHIPPAC LTD·Filed 2015·Granted May 30, 2017·0 cites·23 claims
- 1657US9257357B2Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor dieSTATS CHIPPAC LTD·Filed 2013·Granted Feb 9, 2016·0 cites·23 claims
- 1755USRE47923ESemiconductor device and method of forming PIP with inner known good die interconnected with conductive bumpsSTATS CHIPPAC LTD·Filed 2016·Granted Mar 31, 2020·0 cites·25 claims
- 1851US8890328B2Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layersCAMACHO ZIGMUND R·Filed 2011·Granted Nov 18, 2014·0 cites·28 claims
- 1948US2010320591A1Integrated circuit packaging system with contact pads and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2009·Application pending·0 cites
- 2047US8937393B2Integrated circuit package system with device cavityBATHAN HENRY DESCALZO·Filed 2007·Granted Jan 20, 2015·0 cites·10 claims
- 2144US2011298113A1Integrated circuit packaging system with increased connectivity and method of manufacture thereofDAHILIG FREDERICK RODRIGUEZ·Filed 2011·Application pending·0 cites
- 2243US2010123230A1Integrated circuit packaging system having bumped lead and method of manufacture thereofDAHILIG FREDERICK RODRIGUEZ·Filed 2008·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →