Inventor · disambiguated record
Kenlin Huang
Also filed as: HUANG KENLIN · HUANG KENLIN C · HUANG KENLIN CHENJIN
10 granted patents·2 pending applications·257 citations·filing 1996–2014
91Inventor score
Files withAPPLIED MATERIALS INC3WINBOND ELECTRONICS CORP3HEADWAY TECHNOLOGIES INC2HUANG KENLIN1LAM RES CORP1
Top patents by PatentIndex Score
12 records- 0197US8772051B1Fabrication method for embedded magnetic memoryHEADWAY TECHNOLOGIES INC·Filed 2013·Granted Jul 8, 2014·41 cites·17 claims
- 0295US8933542B2Method to reduce magnetic film stress for better yieldHEADWAY TECHNOLOGIES INC·Filed 2014·Granted Jan 13, 2015·12 cites·6 claims
- 0395US7408212B1Stackable resistive cross-point memory with schottky diode isolationWINBOND ELECTRONICS CORP·Filed 2004·Granted Aug 5, 2008·103 cites·14 claims
- 0492US8803293B2Method to reduce magnetic film stress for better yieldZHONG TOM·Filed 2012·Granted Aug 12, 2014·12 cites·8 claims
- 0591US7972959B2Self aligned double patterning flow with non-sacrificial featuresAPPLIED MATERIALS INC·Filed 2008·Granted Jul 5, 2011·20 cites·16 claims
- 0668US7172939B1Method and structure for fabricating non volatile memory arraysWINBOND ELECTRONICS CORP·Filed 2005·Granted Feb 6, 2007·5 cites·17 claims
- 0767US5827437AMulti-step metallization etchLAM RES CORP·Filed 1996·Granted Oct 27, 1998·38 cites·25 claims
- 0866US7186658B2Method and resulting structure for PCMO film to obtain etching rate and mask to selectively by inductively coupled plasmaWINBOND ELECTRONICS CORP·Filed 2004·Granted Mar 6, 2007·11 cites·24 claims
- 0958US6638874B2Methods used in fabricating gates in integrated circuit device structuresAPPLIED MATERIALS INC·Filed 2002·Granted Oct 28, 2003·7 cites·21 claims
- 1039US2014061827A1Metal Protection Layer over SiN Encapsulation for Spin-Torque MRAM Device ApplicationsHUANG KENLIN·Filed 2012·Application pending·0 cites
- 1137US6635577B1Method for reducing topography dependent charging effects in a plasma enhanced semiconductor wafer processing systemAPPLIED MATERIALS INC·Filed 1999·Granted Oct 21, 2003·8 cites·21 claims
- 1235US2007126052A1Method and apparatus for strapping the control gate and the bit line of a MONOS memory arrayWINBOND ELECTRONICS CORP AMERI·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →