Inventor · disambiguated record
Brian Lee
Also filed as: LEE BRIAN · LEE BRIAN S · LEE BRIAN SEUNGWHAN
47 granted patents·5 pending applications·806 citations·filing 1999–2022
98Inventor score
Files withPROMOS TECHNOLOGIES INC17SEAGATE TECHNOLOGY LLC9INFINEON TECHNOLOGIES AG7IBM3KHOURY MAROUN GEORGES3
Top patents by PatentIndex Score
52 records- 0193US8487390B2Memory cell with stress-induced anisotropyDIMITROV DIMITAR V·Filed 2009·Granted Jul 16, 2013·38 cites·9 claims
- 0293US6284666B1Method of reducing RIE lag for deep trench silicon etchingIBM·Filed 2000·Granted Sep 4, 2001·87 cites·13 claims
- 0392US6939763B2DRAM cell arrangement with vertical MOS transistors, and method for its fabricationINFINEON TECHNOLOGIES AG·Filed 2003·Granted Sep 6, 2005·43 cites·13 claims
- 0490US7939188B2Magnetic stack designSEAGATE TECHNOLOGY LLC·Filed 2009·Granted May 10, 2011·19 cites·14 claims
- 0590US7936592B2Non-volatile memory cell with precessional switchingSEAGATE TECHNOLOGY LLC·Filed 2009·Granted May 3, 2011·18 cites·20 claims
- 0690US7936583B2Variable resistive memory punchthrough access methodSEAGATE TECHNOLOGY LLC·Filed 2008·Granted May 3, 2011·15 cites·11 claims
- 0789US8541247B2Non-volatile memory cell with lateral pinningXI HAIWEN·Filed 2010·Granted Sep 24, 2013·8 cites·8 claims
- 0888US8197953B2Magnetic stack designXI HAIWEN·Filed 2011·Granted Jun 12, 2012·7 cites·19 claims
- 0987US6818515B1Method for fabricating semiconductor device with loop line pattern structurePROMOS TECHNOLOGIES INC·Filed 2003·Granted Nov 16, 2004·31 cites·2 claims
- 1087US6426253B1Method of forming a vertically oriented device in an integrated circuitINFINEON TECHNOLOGIES AG·Filed 2000·Granted Jul 30, 2002·49 cites·27 claims
- 1186US6511905B1Semiconductor device with Si-Ge layer-containing low resistance, tunable contactPROMOS TECHNOLOGIES INC·Filed 2002·Granted Jan 28, 2003·36 cites·18 claims
- 1285US6362040B1Reduction of orientation dependent oxidation for vertical sidewalls of semiconductor substratesINFINEON TECHNOLOGIES AG·Filed 2000·Granted Mar 26, 2002·41 cites·31 claims
- 1383US8289759B2Non-volatile memory cell with precessional switchingWANG XIAOBIN·Filed 2011·Granted Oct 16, 2012·4 cites·20 claims
- 1483US7936622B2Defective bit scheme for multi-layer integrated memory deviceSEAGATE TECHNOLOGY LLC·Filed 2009·Granted May 3, 2011·14 cites·20 claims
- 1582US6770954B2Semiconductor device with SI-GE layer-containing low resistance, tunable contactPROMOS TECHNOLOGIES INC·Filed 2002·Granted Aug 3, 2004·26 cites·14 claims
- 1682US6703279B2Semiconductor device having contact of Si-Ge combined with cobalt silicidePROMOS TECHNOLOGIES INC·Filed 2002·Granted Mar 9, 2004·31 cites·40 claims
- 1782US6521956B1Semiconductor device having contact of Si-Ge combined with cobalt silicidePROMOS TECHNOLOGIES INC·Filed 2002·Granted Feb 18, 2003·29 cites·18 claims
- 1882US6335247B1Integrated circuit vertical trench device and method of forming thereofINFINEON TECHNOLOGIES AG·Filed 2000·Granted Jan 1, 2002·25 cites·19 claims
- 1981US7961497B2Variable resistive memory punchthrough access methodSEAGATE TECHNOLOGY LLC·Filed 2010·Granted Jun 14, 2011·5 cites·17 claims
- 2079US7936585B2Non-volatile memory cell with non-ohmic selection layerSEAGATE TECHNOLOGY LLC·Filed 2009·Granted May 3, 2011·9 cites·20 claims
- 2179US6737316B2Method of forming a deep trench DRAM cellPROMOS TECHNOLOGIES INC·Filed 2001·Granted May 18, 2004·27 cites·28 claims
- 2278US6475906B1Gate contact etch sequence and plasma doping method for sub-150 NM DT-based DRAM devicesPROMOS TECHNOLOGIES INC·Filed 2001·Granted Nov 5, 2002·22 cites·25 claims
- 2377US8203865B2Non-volatile memory cell with non-ohmic selection layerTIAN WEI·Filed 2011·Granted Jun 19, 2012·5 cites·20 claims
- 2474US8508981B2Apparatus for variable resistive memory punchthrough access methodKHOURY MAROUN GEORGES·Filed 2012·Granted Aug 13, 2013·3 cites·20 claims
- 2573US8199558B2Apparatus for variable resistive memory punchthrough access methodKHOURY MAROUN GEORGES·Filed 2011·Granted Jun 12, 2012·3 cites·21 claims
- 2673US7329916B2DRAM cell arrangement with vertical MOS transistorsINFINEON TECHNOLOGIES AG·Filed 2005·Granted Feb 12, 2008·3 cites·20 claims
- 2773US6566190B2Vertical internally-connected trench cell (V-ICTC) and formation method for semiconductor memory devicesPROMOS TECHNOLOGIES INC·Filed 2001·Granted May 20, 2003·20 cites·6 claims
- 2873US6562714B1Consolidation method of junction contact etch for below 150 nanometer deep trench-based DRAM devicesPROMOS TECHNOLOGIES INC·Filed 2001·Granted May 13, 2003·21 cites·23 claims
- 2972US6544888B2Advanced contact integration scheme for deep-sub-150 nm devicesPROMOS TECHNOLOGIES INC·Filed 2001·Granted Apr 8, 2003·17 cites·10 claims
- 3071US6348388B1Process for fabricating a uniform gate oxide of a vertical transistorIBM·Filed 2000·Granted Feb 19, 2002·12 cites·11 claims
- 3169US6472302B1Integration method for raised contact formation for sub-150 nm devicesPROMOS TECHNOLOGIES INC·Filed 2001·Granted Oct 29, 2002·15 cites·30 claims
- 3269US6159874AMethod of forming a hemispherical grained capacitorINFINEON TECHNOLOGIES CORP·Filed 1999·Granted Dec 12, 2000·28 cites·21 claims
- 3368US9374122B2Integrated on-chip duplexer for simultaneous wireless transmissionBROADCOM CORP·Filed 2013·Granted Jun 21, 2016·2 cites·20 claims
- 3467US8098510B2Variable resistive memory punchthrough access methodKHOURY MAROUN GEORGES·Filed 2010·Granted Jan 17, 2012·2 cites·20 claims
- 3566US6475859B1Plasma doping for DRAM with deep trenches and hemispherical grainsINFINEON TECHNOLOGIES AG·Filed 2000·Granted Nov 5, 2002·10 cites·7 claims
- 3666US6372567B1Control of oxide thickness in vertical transistor structuresINFINEON TECHNOLOGIES AG·Filed 2000·Granted Apr 16, 2002·10 cites·9 claims
- 3762US6828615B2Vertical internally-connected trench cell (V-ICTC) and formation method for semiconductor memory devicesPROMOS TECHNOLOGIES INC·Filed 2002·Granted Dec 7, 2004·10 cites·4 claims
- 3862US6150670AProcess for fabricating a uniform gate oxide of a vertical transistorIBM·Filed 1999·Granted Nov 21, 2000·22 cites·9 claims
- 3960US2024385461A1Transmitter photonic integrated circuitROCKLEY PHOTONICS LTD·Filed 2022·Application pending·0 cites
- 4059US8050072B2Dual stage sensing for non-volatile memorySEAGATE TECHNOLOGY LLC·Filed 2009·Granted Nov 1, 2011·3 cites·20 claims
- 4158US8050092B2NAND flash memory with integrated bit line capacitanceSEAGATE TECHNOLOGY LLC·Filed 2009·Granted Nov 1, 2011·3 cites·20 claims
- 4257US7087947B2Semiconductor device with loop line pattern structure, method and alternating phase shift mask for fabricating the samePROMOS TECHNOLOGIES INC·Filed 2004·Granted Aug 8, 2006·4 cites·6 claims
- 4357US6528367B1Self-aligned active array along the length direction to form un-biased buried strap formation for sub-150 NM BEST DRAM devicesPROMOS TECHNOLOGIES INC·Filed 2001·Granted Mar 4, 2003·8 cites·45 claims
- 4455US8537587B2Dual stage sensing for non-volatile memoryLI HAI·Filed 2011·Granted Sep 17, 2013·1 cites·20 claims
- 4552US6207573B1Differential trench open processINFINEON TECHNOLOGIES CORP·Filed 1999·Granted Mar 27, 2001·16 cites·21 claims
- 4648US6759335B2Buried strap formation method for sub-150 nm best DRAM devicesPROMOS TECHNOLOGIES INC·Filed 2001·Granted Jul 6, 2004·3 cites·25 claims
- 4744US7402364B2Semiconductor device with loop line pattern structure, method and alternating phase shift mask for fabricating the samePROMOS TECHNOLOGIES INC·Filed 2004·Granted Jul 22, 2008·0 cites·2 claims
- 4841US8289748B2Tuning a variable resistance of a resistive sense elementLEE BRIAN S·Filed 2009·Granted Oct 16, 2012·1 cites·20 claims
- 4939US2003087492A1Semiconductor device and method of manufacturing the samePROMOS TECHNOLOGIES INC·Filed 2001·Application pending·0 cites
- 5038US2013109331A1Transmit/receive switch with esd protection and methods for use therewithLEE BRIAN·Filed 2011·Application pending·0 cites
Showing the top 50 of 52 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →