Inventor · disambiguated record
Hong-Yi Chen
Also filed as: CHEN HONG · CHEN HONG-YI · CHEN HONG-YI HUBERT
48 granted patents·9 pending applications·723 citations·filing 1995–2025
98Inventor score
Files withMARVELL INT LTD12MARVELL WORLD TRADE LTD8CHEN HONG-YI5SUTARDJA SEHAT5UNITED MICROELECTRONICS CORP3
Top patents by PatentIndex Score
57 records- 0198US7558942B1Memory mapped register file and method for accessing the sameMARVELL INT LTD·Filed 2006·Granted Jul 7, 2009·178 cites·20 claims
- 0295US8195922B2System for dynamically allocating processing time to multiple threadsCHEN HONG-YI·Filed 2005·Granted Jun 5, 2012·52 cites·34 claims
- 0394US8176386B1Systems and methods for processing streaming dataSUTARDJA PANTAS·Filed 2007·Granted May 8, 2012·14 cites·14 claims
- 0488US8572416B2Low power computer with main and auxiliary processorsSUTARDJA SEHAT·Filed 2010·Granted Oct 29, 2013·8 cites·19 claims
- 0588US8392799B1Systems and methods for arbitrating use of processor memorySUTARDJA PANTAS·Filed 2012·Granted Mar 5, 2013·6 cites·25 claims
- 0687US5809522AMicroprocessor system with process identification tag entries to reduce cache flushing after a context switchADVANCED MICRO DEVICES INC·Filed 1995·Granted Sep 15, 1998·149 cites·7 claims
- 0786US7096345B1Data processing system with bypass reorder buffer having non-bypassable locations and combined load/store arithmetic logic unit and processing method thereofMARVELL INT LTD·Filed 2003·Granted Aug 22, 2006·47 cites·58 claims
- 0885US7882332B1Memory mapped register fileMARVELL INT LTD·Filed 2008·Granted Feb 1, 2011·9 cites·14 claims
- 0983US8806181B1Dynamic pipeline reconfiguration including changing a number of stagesO'BLENESS R FRANK·Filed 2009·Granted Aug 12, 2014·14 cites·12 claims
- 1083US8347034B1Transparent level 2 cache that uses independent tag and valid random access memory arrays for cache accessMARVELL INT LTD·Filed 2005·Granted Jan 1, 2013·12 cites·13 claims
- 1183US8074056B1Variable length pipeline processor architectureCHEN HONG-YI·Filed 2005·Granted Dec 6, 2011·13 cites·30 claims
- 1283US7437532B1Memory mapped register fileMARVELL INT LTD·Filed 2003·Granted Oct 14, 2008·24 cites·69 claims
- 1382US7788514B2Low power computer with main and auxiliary processorsMARVELL WORLD TRADE LTD·Filed 2008·Granted Aug 31, 2010·7 cites·25 claims
- 1478US9306474B2Power conversion system and method of operating the sameDELTA ELECTRONICS INC·Filed 2014·Granted Apr 5, 2016·5 cites·18 claims
- 1578US9158355B2Dynamic core switchingSUTARDJA SEHAT·Filed 2008·Granted Oct 13, 2015·6 cites·37 claims
- 1678US7685372B1Transparent level 2 cache controllerMARVELL INT LTD·Filed 2005·Granted Mar 23, 2010·8 cites·7 claims
- 1777US8468324B2Dual thread processorCHEN HONG-YI·Filed 2012·Granted Jun 18, 2013·4 cites·21 claims
- 1876US2025307154A1Fast Synchronization Mechanism for Heterogeneous ComputingMEDIATEK INC·Filed 2025·Application pending·0 cites
- 1973US7730335B2Low power computer with main and auxiliary processorsMARVELL WORLD TRADE LTD·Filed 2004·Granted Jun 1, 2010·11 cites·75 claims
- 2072US8935591B1System and method to correct errors in data read from a source supplying streaming dataMARVELL INT LTD·Filed 2014·Granted Jan 13, 2015·1 cites·14 claims
- 2172US7827423B2Low power computer with main and auxiliary processorsMARVELL WORLD TRADE LTD·Filed 2008·Granted Nov 2, 2010·3 cites·44 claims
- 2271US12360904B2Fast synchronization mechanism for heterogeneous computingMEDIATEK INC·Filed 2023·Granted Jul 15, 2025·0 cites·14 claims
- 2371US8526257B2Processor with memory delayed bit line prechargingMARVELL WORLD TRADE LTD·Filed 2012·Granted Sep 3, 2013·2 cites·20 claims
- 2470US8295110B2Processor instruction cache with dual-read modesSUTARDJA SEHAT·Filed 2011·Granted Oct 23, 2012·2 cites·20 claims
- 2570US7730285B1Data processing system with partial bypass reorder buffer and combined load/store arithmetic logic unit and processing method thereofMARVELL INT LTD·Filed 2006·Granted Jun 1, 2010·4 cites·32 claims
- 2669US8621152B1Transparent level 2 cache that uses independent tag and valid random access memory arrays for cache accessMARVELL INT LTD·Filed 2012·Granted Dec 31, 2013·2 cites·16 claims
- 2768US7949833B1Transparent level 2 cache controllerMARVELL INT LTD·Filed 2010·Granted May 24, 2011·2 cites·20 claims
- 2867US8027218B2Processor instruction cache with dual-read modesMARVELL WORLD TRADE LTD·Filed 2008·Granted Sep 27, 2011·3 cites·52 claims
- 2967US7568083B1Memory mapped register file and method for accessing the sameMARVELL INT LTD·Filed 2003·Granted Jul 28, 2009·8 cites·53 claims
- 3062US6643736B1Scratch pad memoriesADVANCED RISC MACH LTD·Filed 2000·Granted Nov 4, 2003·7 cites·3 claims
- 3159US8667370B1Systems and methods for arbitrating use of processor memoryMARVELL INT LTD·Filed 2013·Granted Mar 4, 2014·0 cites·14 claims
- 3259US2023193436A1Stainless steel powder composition, preparing method thereof and method of preparing stainless steel workpiece by laser additive manufacturingCHUNG YO MAT CO LTD·Filed 2022·Application pending·0 cites
- 3358US8874948B2Apparatuses for operating, during respective power modes, transistors of multiple processors at corresponding duty cyclesMARVELL WORLD TRADE LTD·Filed 2013·Granted Oct 28, 2014·0 cites·20 claims
- 3458US7668356B2Automatic determination of joint space width from hand radiographsSIEMENS MEDICAL SOLUTIONS·Filed 2006·Granted Feb 23, 2010·2 cites·17 claims
- 3556US6676770B2Apparatus and method for removing particles from wafer podsTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Jan 13, 2004·9 cites·20 claims
- 3654US2008263324A1Dynamic core switchingSUTARDJA SEHAT·Filed 2008·Application pending·0 cites
- 3753US2016034022A1Dynamic core switchingMARVELL WORLD TRADE LTD·Filed 2015·Application pending·0 cites
- 3852US5864372AApparatus for implementing a block matching algorithm for motion estimation in video image processingUNITED MICROELECTRONICS CORP·Filed 1996·Granted Jan 26, 1999·21 cites·12 claims
- 3951US8078828B1Memory mapped register fileCHEN HONG-YI·Filed 2011·Granted Dec 13, 2011·0 cites·16 claims
- 4051US7787324B2Processor instruction cache with dual-read modesMARVELL WORLD TRADE LTD·Filed 2007·Granted Aug 31, 2010·0 cites·37 claims
- 4151US5926841ASegment descriptor cache for a processorADVANCED MICRO DEVICES INC·Filed 1996·Granted Jul 20, 1999·25 cites·18 claims
- 4251US5793659AMethod of modular reduction and modular reduction circuitUNITED MICROELECTRONICS CORP·Filed 1996·Granted Aug 11, 1998·28 cites·11 claims
- 4350US9765444B2Continuous electrochemical machining apparatusMETAL IND RES & DEV CT·Filed 2014·Granted Sep 19, 2017·0 cites·15 claims
- 4449US8909903B1Providing data to registers between execution stagesCHEN HONG-YI·Filed 2011·Granted Dec 9, 2014·0 cites·28 claims
- 4548US8089823B2Processor instruction cache with dual-read modesSUTARDJA SEHAT·Filed 2010·Granted Jan 3, 2012·0 cites·19 claims
- 4648US5828590AMultiplier based on a variable radix multiplier codingUNITED MICROELECTRONICS CORP·Filed 1996·Granted Oct 27, 1998·25 cites·10 claims
- 4746US6816943B2Scratch pad memoriesADVANCED RISC MACH LTD·Filed 2003·Granted Nov 9, 2004·0 cites·5 claims
- 4845US2015138709A1Separable electronic devicePEGATRON CORP·Filed 2014·Application pending·0 cites
- 4942US12377979B2Unmanned food delivery device in cabin and application method thereofUNIV SHANDONG SCIENCE & TECH·Filed 2022·Granted Aug 5, 2025·0 cites·4 claims
- 5039US6356995B2Microcode scalable processorPICOTURBO INC·Filed 1998·Granted Mar 12, 2002·11 cites·20 claims
Showing the top 50 of 57 patent records by PatentIndex Score.
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