Inventor · disambiguated record
David A. Kruckemyer
Also filed as: KRUCKEMYER DAVID A · KRUCKEMYER DAVID ALAN
33 granted patents·4 pending applications·409 citations·filing 2001–2023
97Inventor score
Top patents by PatentIndex Score
37 records- 0196US7437597B1Write-back cache with different ECC codings for clean and dirty lines with refetching of uncorrectable clean linesAZUL SYSTEMS INC·Filed 2005·Granted Oct 14, 2008·71 cites·16 claims
- 0295US8850121B1Outstanding load miss buffer with shared entriesASHCRAFT MATTHEW W·Filed 2011·Granted Sep 30, 2014·37 cites·20 claims
- 0394US9542316B1System and method for adaptation of coherence models between agentsARTERIS INC·Filed 2015·Granted Jan 10, 2017·12 cites·15 claims
- 0492US7366847B2Distributed cache coherence at scalable requestor filter pipes that accumulate invalidation acknowledgements from other requestor filter pipes using ordering messages from central snoop tagAZUL SYSTEMS INC·Filed 2006·Granted Apr 29, 2008·31 cites·20 claims
- 0589US9432299B2System and method for ordering of data transferred over multiple channelsSILICON GRAPHICS INT CORP·Filed 2015·Granted Aug 30, 2016·7 cites·18 claims
- 0688US8793435B1Load miss result buffer with shared data linesASHCRAFT MATTHEW W·Filed 2011·Granted Jul 29, 2014·13 cites·26 claims
- 0786US8806135B1Load store unit with load miss result bufferASHCRAFT MATTHEW W·Filed 2011·Granted Aug 12, 2014·10 cites·23 claims
- 0884US7203827B2Link and fall-through address formation using a program counter portion selected by a specific branch address bitBROADCOM CORP·Filed 2005·Granted Apr 10, 2007·12 cites·6 claims
- 0983US7225300B1Duplicate snoop tags partitioned across multiple processor/cache chips in a multi-processor systemAZUL SYSTEMS INC·Filed 2004·Granted May 29, 2007·36 cites·20 claims
- 1083US6745297B2Cache coherent protocol in which exclusive and modified data is transferred to requesting agent from snooping agentBROADCOM CORP·Filed 2001·Granted Jun 1, 2004·31 cites·42 claims
- 1182US9280479B1Multi-level store merging in a cache and memory hierarchyKRUCKEMYER DAVID A·Filed 2012·Granted Mar 8, 2016·8 cites·24 claims
- 1281US7453878B1System and method for ordering of data transferred over multiple channelsSILICON GRAPHICS INC·Filed 2001·Granted Nov 18, 2008·27 cites·14 claims
- 1380US9652391B2Compression of hardware cache coherent addressesARTERIS INC·Filed 2015·Granted May 16, 2017·3 cites·16 claims
- 1478US11080191B2Configurable snoop filters for cache coherent systemsARTERIS INC·Filed 2020·Granted Aug 3, 2021·1 cites·14 claims
- 1578US6993632B2Cache coherent protocol in which exclusive and modified data is transferred to requesting agent from snooping agentBROADCOM CORP·Filed 2004·Granted Jan 31, 2006·21 cites·12 claims
- 1677US9807025B2System and method for ordering of data transferred over multiple channelsSILICON GRAPHICS INT CORP·Filed 2016·Granted Oct 31, 2017·2 cites·14 claims
- 1777US6971038B2Clock gating of sub-circuits within a processor execution unit responsive to instruction latency counter within processor issue circuitBROADCOM CORP·Filed 2002·Granted Nov 29, 2005·23 cites·16 claims
- 1871US6883090B2Method for cancelling conditional delay slot instructionsBROADCOM CORP·Filed 2001·Granted Apr 19, 2005·16 cites·11 claims
- 1970US8971329B1System and method for ordering of data transferred over multiple channelsMARTIN RANDAL G·Filed 2008·Granted Mar 3, 2015·4 cites·17 claims
- 2068US6976152B2Comparing operands of instructions against a replay scoreboard to detect an instruction replay and copying a replay scoreboard to an issue scoreboardBROADCOM CORP·Filed 2002·Granted Dec 13, 2005·14 cites·31 claims
- 2166US11237965B2Configurable snoop filters for cache coherent systemsARTERIS INC·Filed 2014·Granted Feb 1, 2022·1 cites·4 claims
- 2265US12481310B2Method and apparatus for deskewing die to die communication between system on chip devicesVENTANA MICRO SYSTEMS INC·Filed 2023·Granted Nov 25, 2025·0 cites·20 claims
- 2365US6874081B2Selection of link and fall-through address using a bit in a branch address for the selectionBROADCOM CORP·Filed 2001·Granted Mar 29, 2005·9 cites·22 claims
- 2464US7269714B2Inhibiting of a co-issuing instruction in a processor having different pipeline lengthsBROADCOM CORP·Filed 2002·Granted Sep 11, 2007·10 cites·6 claims
- 2561US12026095B2Cache coherent system implementing victim buffersARTERIS INC·Filed 2022·Granted Jul 2, 2024·0 cites·5 claims
- 2660US11507510B2Method for using victim buffer in cache coherent systemsARTERIS INC·Filed 2018·Granted Nov 22, 2022·0 cites·10 claims
- 2759US6859874B2Method for identifying basic blocks with conditional delay slot instructionsBROADCOM CORP·Filed 2001·Granted Feb 22, 2005·5 cites·29 claims
- 2857US10255183B2Victim buffer for cache coherent systemsARTERIS INC·Filed 2017·Granted Apr 9, 2019·0 cites·1 claims
- 2954US6785804B2Use of tags to cancel a conditional branch delay slot instructionBROADCOM CORP·Filed 2001·Granted Aug 31, 2004·3 cites·18 claims
- 3053US7296141B2Method for cancelling speculative conditional delay slot instructionsBROADCOM CORP·Filed 2004·Granted Nov 13, 2007·2 cites·17 claims
- 3149US2016188470A1Promotion of a cache line sharer to cache line ownerARTERIS INC·Filed 2014·Application pending·0 cites
- 3248US7219216B2Method for identifying basic blocks with conditional delay slot instructionsBROADCOM CORP·Filed 2005·Granted May 15, 2007·0 cites·4 claims
- 3347US10133671B2Proxy cache conditional allocationKRUCKEMYER DAVID A·Filed 2016·Granted Nov 20, 2018·0 cites·15 claims
- 3445US9213643B2Broadcast messaging and acknowledgment messaging for power management in a multiprocessor systemKRUCKEMYER DAVID ALAN·Filed 2013·Granted Dec 15, 2015·0 cites·19 claims
- 3543US2005149698A1Scoreboarding mechanism in a pipeline that includes replays and redirectsFiled 2005·Application pending·0 cites
- 3641US2017255558A1Isolation mode in a cache coherent systemARTERIS INC·Filed 2017·Application pending·0 cites
- 3736US2016188472A1Distributed implementation for cache coherenceARTERIS INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →