Inventor · disambiguated record
Gan Wang
Also filed as: WANG GAN · WANG GAN G
21 granted patents·5 pending applications·397 citations·filing 2000–2025
94Inventor score
Top patents by PatentIndex Score
26 records- 0197US7901897B2Methods of making arraysILLUMINA INC·Filed 2009·Granted Mar 8, 2011·61 cites·34 claims
- 0296US8628952B2Array kits and processing systemsSTUELPNAGEL JOHN R·Filed 2009·Granted Jan 14, 2014·46 cites·70 claims
- 0396US8481415B2Self-aligned contact combined with a replacement metal gate/high-K gate dielectricYUAN JUN·Filed 2010·Granted Jul 9, 2013·28 cites·15 claims
- 0496US8084346B1Replacement metal gate methodGUO DECHAO·Filed 2010·Granted Dec 27, 2011·26 cites·20 claims
- 0596US6396995B1Method and apparatus for retaining and presenting at least one microsphere array to solutions and/or to optical imaging systemsILLUMINA INC·Filed 2000·Granted May 28, 2002·200 cites·24 claims
- 0692US9171954B2FinFET structure and method to adjust threshold voltage in a FinFET structureIBM·Filed 2014·Granted Oct 27, 2015·9 cites·14 claims
- 0790US8236632B2FET structures with trench implantation to improve back channel leakage and body resistanceFRIED DAVID M·Filed 2010·Granted Aug 7, 2012·10 cites·24 claims
- 0885US8809953B2FET structures with trench implantation to improve back channel leakage and body resistanceFRIED DAVID M·Filed 2012·Granted Aug 19, 2014·6 cites·20 claims
- 0984US8772149B2FinFET structure and method to adjust threshold voltage in a FinFET structureCARTIER EDUARD A·Filed 2011·Granted Jul 8, 2014·5 cites·8 claims
- 1081US8932949B2FinFET structure and method to adjust threshold voltage in a FinFET structureIBM·Filed 2014·Granted Jan 13, 2015·3 cites·17 claims
- 1166US2017144126A1Composite arrays utilizing microspheres with a hybridization chamberILLUMINA INC·Filed 2016·Application pending·0 cites
- 1263US8592266B2Replacement gate MOSFET with a high performance gate electrodeLI ZHENGWEN·Filed 2010·Granted Nov 26, 2013·1 cites·12 claims
- 1362US2009298716A1Composite arrays utilizing microspheres with a hybridization chamberILLUMINA INC·Filed 2009·Application pending·0 cites
- 1461US9034715B2Method and structure for dielectric isolation in a fin field effect transistorIBM·Filed 2013·Granted May 19, 2015·1 cites·9 claims
- 1559US8841732B2Self-adjusting latch-up resistance for CMOS devicesLIU YANXIANG·Filed 2011·Granted Sep 23, 2014·1 cites·13 claims
- 1658US2025153237A1Early warning method for fatigue damage state of tie rod in diameter expanding machine based on oil pressure of power cylinderUNIV HUNAN SCIENCE & TECHNOLOGY·Filed 2025·Application pending·0 cites
- 1757US9337289B2Replacement gate MOSFET with a high performance gate electrodeGLOBALFOUNDRIES INC·Filed 2014·Granted May 10, 2016·0 cites·12 claims
- 1854US8969933B2Replacement gate MOSFET with a high performance gate electrodeIBM·Filed 2013·Granted Mar 3, 2015·0 cites·8 claims
- 1952US9059291B2Semiconductor-on-insulator device including stand-alone well implant to provide junction buttingIBM·Filed 2013·Granted Jun 16, 2015·0 cites·8 claims
- 2051US9105725B2Semiconductor-on-insulator device including stand-alone well implant to provide junction buttingIBM·Filed 2014·Granted Aug 11, 2015·0 cites·10 claims
- 2150US9312358B2Partially-blocked well implant to improve diode ideality with SiGe anodeGUO DECHAO·Filed 2012·Granted Apr 12, 2016·0 cites·17 claims
- 2250US9252234B2Partially-blocked well implant to improve diode ideality with SiGe anodeGUO DECHAO·Filed 2012·Granted Feb 2, 2016·0 cites·17 claims
- 2348US9209200B2Methods for forming a self-aligned maskless junction butting for integrated circuitsIBM·Filed 2013·Granted Dec 8, 2015·0 cites·14 claims
- 2441US10848960B2Method and system for interaction between AP and modem, and storage mediumJRD COMMUNICATION SHENZHEN LTD·Filed 2018·Granted Nov 24, 2020·0 cites·7 claims
- 2541US2014008756A1Deep trench heat sinkPEI CHENGWEN·Filed 2012·Application pending·0 cites
- 2638US2018108654A1Finfet device with low resistance finsGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →