Inventor · disambiguated record
Andrew H. Simon
Also filed as: SIMON ANDREW · SIMON ANDREW H · SIMON ANDREW HERBERT
112 granted patents·21 pending applications·1,987 citations·filing 1992–2024
99Inventor score
Top patents by PatentIndex Score
133 records- 0199US9502350B1Interconnect scaling method including forming dielectric layer over subtractively etched first conductive layer and forming second conductive material on dielectric layerIBM·Filed 2016·Granted Nov 22, 2016·49 cites·14 claims
- 0298US9601426B1Interconnect structure having subtractive etch feature and damascene featureIBM·Filed 2016·Granted Mar 21, 2017·26 cites·5 claims
- 0398US6181012B1Copper interconnection structure incorporating a metal seed layerIBM·Filed 1998·Granted Jan 30, 2001·335 cites·30 claims
- 0498US5933753AOpen-bottomed via liner structure and method for fabricating sameIBM·Filed 1996·Granted Aug 3, 1999·281 cites·10 claims
- 0596US9679810B1Integrated circuit having improved electromigration performance and method of forming sameGLOBALFOUNDRIES INC·Filed 2016·Granted Jun 13, 2017·18 cites·15 claims
- 0695US11456415B2Phase change memory cell with a wrap around and ring type of electrode contact and a projection linerIBM·Filed 2020·Granted Sep 27, 2022·4 cites·20 claims
- 0795US10256186B2Interconnect structure having subtractive etch feature and damascene featureIBM·Filed 2017·Granted Apr 9, 2019·9 cites·16 claims
- 0895US10177031B2Subtractive etch interconnectsIBM·Filed 2014·Granted Jan 8, 2019·22 cites·10 claims
- 0995US7446036B1Gap free anchored conductor and dielectric structure and method for fabrication thereofIBM·Filed 2007·Granted Nov 4, 2008·42 cites·1 claims
- 1095US6975032B2Copper recess process with application to selective capping and electroless platingIBM·Filed 2002·Granted Dec 13, 2005·85 cites·19 claims
- 1195US6399496B1Copper interconnection structure incorporating a metal seed layerIBM·Filed 2000·Granted Jun 4, 2002·94 cites·21 claims
- 1294US11930724B2Phase change memory cell spacerIBM·Filed 2021·Granted Mar 12, 2024·2 cites·13 claims
- 1394US9171801B2E-fuse with hybrid metallizationIBM·Filed 2014·Granted Oct 27, 2015·19 cites·16 claims
- 1494US8633707B2Stacked via structure for metal fuse applicationsFILIPPI RONALD G·Filed 2011·Granted Jan 21, 2014·15 cites·17 claims
- 1594US8232148B2Structure and method to make replacement metal gate and contact metalLI ZHENGWEN·Filed 2010·Granted Jul 31, 2012·19 cites·12 claims
- 1693US9852980B2Interconnect structure having substractive etch feature and damascene featureIBM·Filed 2017·Granted Dec 26, 2017·7 cites·20 claims
- 1793US9685404B2Back-end electrically programmable fuseBAO JUNJING·Filed 2012·Granted Jun 20, 2017·14 cites·11 claims
- 1893US8232646B2Interconnect structure for integrated circuits having enhanced electromigration resistanceBONILLA GRISELDA·Filed 2010·Granted Jul 31, 2012·17 cites·15 claims
- 1992US9536830B2High performance refractory metal / copper interconnects to eliminate electromigrationIBM·Filed 2013·Granted Jan 3, 2017·14 cites·12 claims
- 2092US8729702B1Copper seed layer for an interconnect structure having a doping concentration level gradientST MICROELECTRONICS INC·Filed 2012·Granted May 20, 2014·13 cites·26 claims
- 2192US7064064B2Copper recess process with application to selective capping and electroless platingIBM·Filed 2005·Granted Jun 20, 2006·22 cites·10 claims
- 2291US9431292B1Alternate dual damascene method for forming interconnectsGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 30, 2016·8 cites·20 claims
- 2391US9059170B2Electronic fuse having a damaged regionIBM·Filed 2013·Granted Jun 16, 2015·12 cites·24 claims
- 2491US8129286B2Reducing effective dielectric constant in semiconductor devicesEDELSTEIN DANIEL C·Filed 2008·Granted Mar 6, 2012·11 cites·32 claims
- 2591US8056039B2Interconnect structure for integrated circuits having improved electromigration characteristicsIBM·Filed 2008·Granted Nov 8, 2011·23 cites·17 claims
- 2691US7892940B2Device and methodology for reducing effective dielectric constant in semiconductor devicesIBM·Filed 2007·Granted Feb 22, 2011·11 cites·25 claims
- 2791US7405147B2Device and methodology for reducing effective dielectric constant in semiconductor devicesIBM·Filed 2004·Granted Jul 29, 2008·35 cites·31 claims
- 2890US11476418B2Phase change memory cell with a projection linerIBM·Filed 2020·Granted Oct 18, 2022·2 cites·14 claims
- 2989US8343868B2Device and methodology for reducing effective dielectric constant in semiconductor devicesIBM·Filed 2011·Granted Jan 1, 2013·6 cites·20 claims
- 3089US7241681B2Bilayered metal hardmasks for use in dual damascene etch schemesIBM·Filed 2006·Granted Jul 10, 2007·13 cites·8 claims
- 3188US9293412B2Graphene and metal interconnects with reduced contact resistanceIBM·Filed 2014·Granted Mar 22, 2016·9 cites·18 claims
- 3288US8916461B2Electronic fuse vias in interconnect structuresIBM·Filed 2012·Granted Dec 23, 2014·8 cites·9 claims
- 3388US8736020B2Electronic anti-fuseBAO JUNJING·Filed 2012·Granted May 27, 2014·10 cites·18 claims
- 3488US6123825AElectromigration-resistant copper microstructure and process of makingIBM·Filed 1998·Granted Sep 26, 2000·85 cites·25 claims
- 3587US9455186B2Selective local metal cap layer formation for improved electromigration behaviorIBM·Filed 2015·Granted Sep 27, 2016·4 cites·1 claims
- 3687US9142506B2E-fuse structures and methods of manufactureIBM·Filed 2013·Granted Sep 22, 2015·7 cites·11 claims
- 3787US7592685B2Device and methodology for reducing effective dielectric constant in semiconductor devicesIBM·Filed 2007·Granted Sep 22, 2009·7 cites·20 claims
- 3887US6960519B1Interconnect structure improvementsIBM·Filed 2004·Granted Nov 1, 2005·43 cites·17 claims
- 3987US6784105B1Simultaneous native oxide removal and metal neutral deposition methodINFINEON TECHNOLOGIES CORP·Filed 2003·Granted Aug 31, 2004·45 cites·16 claims
- 4086US6380075B1Method for forming an open-bottom liner for a conductor in an electronic structure and device formedIBM·Filed 2000·Granted Apr 30, 2002·36 cites·10 claims
- 4185US9202743B2Graphene and metal interconnectsIBM·Filed 2012·Granted Dec 1, 2015·7 cites·18 claims
- 4285US8962467B2Metal fuse structure for improved programming capabilityBONILLA GRISELDA·Filed 2012·Granted Feb 24, 2015·6 cites·9 claims
- 4384US9412658B2Constrained nanosecond laser anneal of metal interconnect structuresIBM·Filed 2014·Granted Aug 9, 2016·7 cites·19 claims
- 4484US7737528B2Structure and method of forming electrically blown metal fuses for integrated circuitsIBM·Filed 2008·Granted Jun 15, 2010·12 cites·20 claims
- 4584US6958540B2Dual damascene interconnect structures having different materials for line and via conductorsIBM·Filed 2003·Granted Oct 25, 2005·29 cites·6 claims
- 4684US6924223B2Method of forming a metal layer using an intermittent precursor gas flow processIBM·Filed 2003·Granted Aug 2, 2005·32 cites·53 claims
- 4783US6949461B2Method for depositing a metal layer on a semiconductor interconnect structureIBM·Filed 2002·Granted Sep 27, 2005·37 cites·18 claims
- 4882US9111938B2Copper interconnect with CVD liner and metallic capIBM·Filed 2014·Granted Aug 18, 2015·5 cites·8 claims
- 4982US9059176B2Copper interconnect with CVD liner and metallic capBAUMANN FRIEDER HAINRICH·Filed 2012·Granted Jun 16, 2015·8 cites·18 claims
- 5080US8742766B2Stacked via structure for metal fuse applicationsIBM·Filed 2013·Granted Jun 3, 2014·3 cites·3 claims
Showing the top 50 of 133 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →