Inventor · disambiguated record
Peter H. Mitchell
Also filed as: MITCHELL PETER H
44 granted patents·6 pending applications·1,191 citations·filing 1999–2022
98Inventor score
Top patents by PatentIndex Score
50 records- 0198US6875703B1Method for forming quadruple density sidewall image transfer (SIT) structuresIBM·Filed 2004·Granted Apr 5, 2005·286 cites·9 claims
- 0298US6713835B1Method for manufacturing a multi-level interconnect structureIBM·Filed 2003·Granted Mar 30, 2004·297 cites·39 claims
- 0394US7691720B2Vertical nanotube semiconductor device structures and methods of forming the sameIBM·Filed 2007·Granted Apr 6, 2010·22 cites·17 claims
- 0494US7535016B2Vertical carbon nanotube transistor integrationIBM·Filed 2005·Granted May 19, 2009·33 cites·20 claims
- 0594US7473633B2Method for making integrated circuit chip having carbon nanotube composite interconnection viasIBM·Filed 2006·Granted Jan 6, 2009·29 cites·18 claims
- 0689US7674674B2Method of forming a dual gated FinFET gain cellIBM·Filed 2008·Granted Mar 9, 2010·13 cites·10 claims
- 0789US7135773B2Integrated circuit chip utilizing carbon nanotube composite interconnection viasIBM·Filed 2004·Granted Nov 14, 2006·49 cites·17 claims
- 0889US6970372B1Dual gated finfet gain cellIBM·Filed 2004·Granted Nov 29, 2005·37 cites·18 claims
- 0987US7566613B2Method of forming a dual gated FinFET gain cellIBM·Filed 2005·Granted Jul 28, 2009·11 cites·13 claims
- 1087US7088422B2Moving lens for immersion optical lithographyIBM·Filed 2003·Granted Aug 8, 2006·29 cites·16 claims
- 1185US6342735B1Dual use alignment aidIBM·Filed 1999·Granted Jan 29, 2002·84 cites·22 claims
- 1284US7585614B2Sub-lithographic imaging techniques and processesIBM·Filed 2004·Granted Sep 8, 2009·28 cites·20 claims
- 1384US7439081B2Method for making integrated circuit chip utilizing oriented carbon nanotube conductive layersIBM·Filed 2006·Granted Oct 21, 2008·6 cites·11 claims
- 1484US7374793B2Methods and structures for promoting stable synthesis of carbon nanotubesIBM·Filed 2003·Granted May 20, 2008·31 cites·25 claims
- 1583US10589445B1Method of cleaving a single crystal substrate parallel to its active planar surface and method of using the cleaved daughter substrateSEMIVATION LLC·Filed 2018·Granted Mar 17, 2020·2 cites·21 claims
- 1681US7560347B2Methods for forming a wrap-around gate field effect transistorIBM·Filed 2008·Granted Jul 14, 2009·5 cites·19 claims
- 1781US7329567B2Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passageIBM·Filed 2005·Granted Feb 12, 2008·6 cites·26 claims
- 1881US7038299B2Selective synthesis of semiconducting carbon nanotubesIBM·Filed 2003·Granted May 2, 2006·40 cites·65 claims
- 1980US7385673B2Immersion lithography with equalized pressure on at least projection optics component and waferIBM·Filed 2005·Granted Jun 10, 2008·4 cites·6 claims
- 2080US7229909B2Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubesIBM·Filed 2004·Granted Jun 12, 2007·24 cites·23 claims
- 2179US6890828B2Method for supporting a bond pad in a multilevel interconnect structure and support structure formed therebyIBM·Filed 2003·Granted May 10, 2005·26 cites·32 claims
- 2278US7271444B2Wrap-around gate field effect transistorIBM·Filed 2003·Granted Sep 18, 2007·16 cites·8 claims
- 2377US7211844B2Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passageIBM·Filed 2004·Granted May 1, 2007·16 cites·24 claims
- 2477US6989308B2Method of forming FinFET gates without long etchesIBM·Filed 2004·Granted Jan 24, 2006·24 cites·10 claims
- 2575US7250347B2Double-gate FETs (Field Effect Transistors)IBM·Filed 2005·Granted Jul 31, 2007·6 cites·20 claims
- 2672US7820502B2Methods of fabricating vertical carbon nanotube field effect transistors for arrangement in arrays and field effect transistors and arrays formed therebyIBM·Filed 2007·Granted Oct 26, 2010·3 cites·13 claims
- 2772US7273794B2Shallow trench isolation fill by liquid phase deposition of SiO2IBM·Filed 2003·Granted Sep 25, 2007·13 cites·12 claims
- 2870US7129097B2Integrated circuit chip utilizing oriented carbon nanotube conductive layersIBM·Filed 2004·Granted Oct 31, 2006·9 cites·13 claims
- 2969US7829883B2Vertical carbon nanotube field effect transistors and arraysIBM·Filed 2004·Granted Nov 9, 2010·10 cites·24 claims
- 3069US6998204B2Alternating phase mask built by additive film depositionIBM·Filed 2003·Granted Feb 14, 2006·9 cites·20 claims
- 3165US7026259B2Liquid-filled balloons for immersion lithographyIBM·Filed 2004·Granted Apr 11, 2006·7 cites·21 claims
- 3258US7264415B2Methods of forming alternating phase shift masks having improved phase-shift toleranceIBM·Filed 2004·Granted Sep 4, 2007·4 cites·48 claims
- 3357US7889317B2Immersion lithography with equalized pressure on at least projection optics component and waferIBM·Filed 2008·Granted Feb 15, 2011·0 cites·14 claims
- 3457US7786583B2Integrated circuit chip utilizing oriented carbon nanotube conductive layersIBM·Filed 2007·Granted Aug 31, 2010·0 cites·14 claims
- 3557US7027125B2System and apparatus for photolithographyIBM·Filed 2004·Granted Apr 11, 2006·4 cites·20 claims
- 3656US7435653B2Methods for forming a wrap-around gate field effect transistorIBM·Filed 2007·Granted Oct 14, 2008·0 cites·19 claims
- 3754US11978820B2Thin single-crystal silicon solar cells mounted to a structural support member and method of fabricatingSEMIVATION LLC·Filed 2022·Granted May 7, 2024·0 cites·21 claims
- 3854US6875685B1Method of forming gas dielectric with support structureIBM·Filed 2003·Granted Apr 5, 2005·5 cites·20 claims
- 3953US7989222B2Method of making integrated circuit chip utilizing oriented carbon nanotube conductive layersIBM·Filed 2010·Granted Aug 2, 2011·0 cites·10 claims
- 4053US7525156B2Shallow trench isolation fill by liquid phase deposition of SiO2IBM·Filed 2007·Granted Apr 28, 2009·0 cites·12 claims
- 4152US7851064B2Methods and structures for promoting stable synthesis of carbon nanotubesIBM·Filed 2008·Granted Dec 14, 2010·0 cites·7 claims
- 4252US2008197448A1SHALLOW TRENCH ISOLATION FILL BY LIQUID PHASE DEPOSITION OF SiO2IBM·Filed 2008·Application pending·0 cites
- 4349US2007184647A1Integrated Circuit Chip Utilizing Dielectric Layer Having Oriented Cylindrical Voids Formed from Carbon NanotubesIBM·Filed 2007·Application pending·0 cites
- 4445US2008040696A1Design Structures Incorporating Shallow Trench Isolation Filled by Liquid Phase Deposition of SiO2IBM·Filed 2007·Application pending·0 cites
- 4543US2005167655A1Vertical nanotube semiconductor device structures and methods of forming the sameIBM·Filed 2004·Application pending·0 cites
- 4643US2007296937A1Illumination light in immersion lithography stepper for particle or bubble detectionIBM·Filed 2006·Application pending·0 cites
- 4741US7109546B2Horizontal memory gain cellsIBM·Filed 2004·Granted Sep 19, 2006·2 cites·42 claims
- 4841US2005145838A1Vertical Carbon Nanotube Field Effect TransistorIBM·Filed 2004·Application pending·0 cites
- 4938US7271878B2Wafer cell for immersion lithographyIBM·Filed 2004·Granted Sep 18, 2007·0 cites·15 claims
- 5033US6369397B1SPM base focal plane positioningIBM·Filed 1999·Granted Apr 9, 2002·1 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →