Inventor · disambiguated record
Kuo-Tung Sung
Also filed as: SUNG KUO-TUNG
35 granted patents·2 pending applications·850 citations·filing 1995–2014
98Inventor score
Files withMOSEL VITELIC INC25UNITED INTEGRATED CIRCUITS CORP3HOU YUNG-CHIN1HSUEH FU LUNG1MACRONIX INT CO LTD1
Top patents by PatentIndex Score
37 records- 0192US6194272B1Split gate flash cell with extremely small cell sizeMOSEL VITELIC INC·Filed 1998·Granted Feb 27, 2001·86 cites·8 claims
- 0291US6469341B1Method and device for producing undercut gate for flash memoryMOSEL VITELIC INC·Filed 2000·Granted Oct 22, 2002·59 cites·18 claims
- 0391US6040216AMethod (and device) for producing tunnel silicon oxynitride layerMOSEL VITELIC INC·Filed 1998·Granted Mar 21, 2000·99 cites·17 claims
- 0485US8217469B2Contact implement structure for high density designHOU YUNG-CHIN·Filed 2010·Granted Jul 10, 2012·17 cites·20 claims
- 0585US6184093B1Method of implementing differential gate oxide thickness for flash EEPROMMOSEL VITELIC INC·Filed 1998·Granted Feb 6, 2001·61 cites·23 claims
- 0678US6261903B1Floating gate method and deviceMOSEL VITELIC INC·Filed 1998·Granted Jul 17, 2001·41 cites·7 claims
- 0777US6255205B1High density programmable read-only memory employing double-wall spacersMOSEL VITELIC INC·Filed 1998·Granted Jul 3, 2001·35 cites·20 claims
- 0877US6044018ASingle-poly flash memory cell for embedded application and related methodsMOSEL VITELIC INC·Filed 1998·Granted Mar 28, 2000·41 cites·5 claims
- 0975US6136653AMethod and device for producing undercut gate for flash memoryMOSEL VITELIC INC·Filed 1998·Granted Oct 24, 2000·31 cites·17 claims
- 1074US5963806AMethod of forming memory cell with built-in erasure featureMOSEL VITELIC INC·Filed 1997·Granted Oct 5, 1999·32 cites·17 claims
- 1173US6242774B1Poly spacer split gate cell with extremely small cell sizeMOSEL VITELIC INC·Filed 1999·Granted Jun 5, 2001·26 cites·30 claims
- 1269US5783473AStructure and manufacturing process of a split gate flash memory unitMOSEL VITELIC INC·Filed 1997·Granted Jul 21, 1998·25 cites·16 claims
- 1368US6440796B2Poly spacer split gate cell with extremely small cell sizeMOSEL VITELIC INC·Filed 2001·Granted Aug 27, 2002·11 cites·15 claims
- 1467US6414350B1EPROM cell having a gate structure with dual side-wall spacers of differential compositionMOSEL VITELIC INC·Filed 1999·Granted Jul 2, 2002·23 cites·10 claims
- 1567US6054350AEPROM cell having a gate structure with sidewall spacers of differential compositionMOSEL VITELIC INC·Filed 1998·Granted Apr 25, 2000·23 cites·11 claims
- 1666US6136647AMethod of forming interpoly dielectric and gate oxide in a memory cellMOSEL VITELIC INC·Filed 1997·Granted Oct 24, 2000·25 cites·11 claims
- 1766US5834351ANitridation process with peripheral region protectionMACRONIX INT CO LTD·Filed 1995·Granted Nov 10, 1998·23 cites·11 claims
- 1864US6352897B1Method of improving edge recess problem of shallow trench isolationUNITED MICROELECTRONICS CORP·Filed 1999·Granted Mar 5, 2002·28 cites·10 claims
- 1961US6194269B1Method to improve cell performance in split gate flash EEPROMFiled 1998·Granted Feb 27, 2001·22 cites·19 claims
- 2060US6365455B1Flash memory process using polysilicon spacersMOSEL VITELIC INC·Filed 1998·Granted Apr 2, 2002·21 cites·15 claims
- 2159US6265754B1Covered slit isolation between integrated circuit devicesMOSEL VITELIC INC·Filed 2000·Granted Jul 24, 2001·7 cites·10 claims
- 2256US9607121B2Cascode CMOS structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Mar 28, 2017·0 cites·19 claims
- 2355US6083792AManufacturing process of a split gate flash memory unitMOSEL VITELIC INC·Filed 1996·Granted Jul 4, 2000·16 cites·13 claims
- 2454US6331721B1Memory cell with built in erasure featureMOSEL VITELIC INC·Filed 1999·Granted Dec 18, 2001·13 cites·16 claims
- 2549US5789296AMethod for manufacturing split gate flash memoryMOSEL VITELIC INC·Filed 1996·Granted Aug 4, 1998·11 cites·10 claims
- 2647US6165843ACovered slit isolation between integrated circuit devicesMOSEL VITELIC INC·Filed 1998·Granted Dec 26, 2000·11 cites·18 claims
- 2746US8847321B2Cascode CMOS structureHSUEH FU-LUNG·Filed 2010·Granted Sep 30, 2014·0 cites·11 claims
- 2846US6093627ASelf-aligned contact process using silicon spacersMOSEL VITELIC INC·Filed 1998·Granted Jul 25, 2000·13 cites·19 claims
- 2946US5917214ASplit gate flash memory unitMOSEL VITELIC INC·Filed 1998·Granted Jun 29, 1999·8 cites·8 claims
- 3042US6033968AMethod for forming a shallow trench isolation structureUNITED INTEGRATED CIRCUITS CORP·Filed 1999·Granted Mar 7, 2000·9 cites·17 claims
- 3140US6238977B1Method for fabricating a nonvolatile memory including implanting the source region, forming the first spacers, implanting the drain regions, forming the second spacers, and forming a source line on the source and second spacersUNITED INTEGRATED CIRCUITS CORP·Filed 1999·Granted May 29, 2001·5 cites·19 claims
- 3240US6121116AFlash memory device isolation method and structureMOSEL VITELIC INC·Filed 1998·Granted Sep 19, 2000·8 cites·9 claims
- 3339US6057197AIsolation scheme to prevent field oxide edge from oxide lossMOSEL VITELIC INC·Filed 1998·Granted May 2, 2000·7 cites·14 claims
- 3435US6110796AMethod of improving junction leakage problem of shallow trench isolation by covering said STI with an insulating layer during salicide processUNITED INTEGRATED CIRCUITS CORP·Filed 1999·Granted Aug 29, 2000·5 cites·11 claims
- 3532US6171927B1Device with differential field isolation thicknesses and related methodsFiled 1998·Granted Jan 9, 2001·8 cites·16 claims
- 3632US2001010960A1Floating gate method and deviceFiled 2001·Application pending·0 cites
- 3728US2001001490A1Device with differential field isolation thicknesses and related methodsFiled 2000·Application pending·0 cites
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