Device with differential field isolation thicknesses and related methods

Abstract

A semiconductor device structure with differential field oxide thicknesses. A single field oxidation step produces a nitrided field oxide region ( 322 ) that is thinner than a non-nitrided field oxide region ( 324 ). The bird's beak ( 326 ) of the nitrided field oxide ( 322 ) encroaches less into the active cell region than the bird's beak ( 328 ) of the thicker non-nitrided field oxide ( 324 ). The differential field oxide thicknesses allow isolation of multi-voltage integrated circuit devices, such as flash memory devices, while increasing available active cell area for a given design rule.

What is claimed is:  
     
         1 . A method for producing an intermediate semi-conductor device structure, the method comprising: 
 (a) patterning an oxidation mask layer disposed on a substrate to create a first window region and a second window region, then;    (b) forming a layer of resist on the oxidation mask layer,    (c) patterning the layer of resist to cover the second window region and not the first window region, then;    (d) nitridizing the first window region, the second window region remaining non-nitridized, then;    (e) stripping the layer of resist from the oxide layer;    (f) oxidizing the substrate to form a nitridized field oxide in the first window region and a non-nitridized field oxide in the second window region, the nitridized field oxide being thinner than the non-nitridized field oxide; and    (g) stripping the oxidation mask from the substrate.    
     
     
         2 . The method of    claim 1    wherein the step (d) of nitridizing is performed by an implantation process.  
     
     
         3 . The method of    claim 1    wherein the step (d) of nitridizing is performed by applying a nitrogen source to at least the first window region.  
     
     
         4 . The method of    claim 1    where the step (f) of oxidizing the substrate is a single field oxidation step.  
     
     
         5 . The method of    claim 4    where the step (f) produces a non-nitridized field oxide thickness of between about 3,000-8,000 Å and a nitridized field oxide thickness of between about 1,000-3,000 Å.  
     
     
         6 . The method of    claim 5    wherein the non-nitridized field oxide thickness is at least about 1.5 times the nitridized field oxide thickness.  
     
     
         7 . A method for producing an intermediate flash memory semiconductor device structure, the method comprising: 
 (a) patterning an oxidation mask layer disposed on a substrate to create a first window region and a second window region, the first window region adjoining a low-voltage active cell and the second window region adjoining a high-voltage active cell, then;    (b) forming a layer of resist on the oxidation mask layer,    (c) patterning the layer of resist to cover the second window region and not the first window region, then;    (d) implanting nitrogen to nitridize the first window region, the second window region remaining non-nitridized, then;    (e) stripping the layer of resist from the oxide layer;    (f) oxidizing the substrate to form a nitridized field oxide in the first window region and a non-nitridized field oxide in the second window region, the nitridized field oxide being at least about 20% thinner than the non-nitridized field oxide; and    (g) stripping the oxidation mask from the substrate.    
     
     
         8 . A method for producing an intermediate semi-conductor device structure, the method comprising: 
 (a) patterning an oxidation mask layer disposed on a substrate to create a first window region, then;    (b) nitridizing at least the first window region;    (c) patterning the oxidation mask layer to create a second window region, then;    (d) oxidizing the substrate to form a nitridized field oxide in the first window region and a non-nitridized field oxide in the second window region, the non-nitridized field oxide being at least about 1.5 times thicker than the nitridized field oxide; and    (e) stripping the oxidation mask from the substrate.    
     
     
         9 . The method of    claim 8    wherein the step (b) of nitridizing is performed by an implantation process.  
     
     
         10 . The method of    claim 8    wherein the step (b) of nitridizing is performed by applying a nitrogen source to at least the first window region.  
     
     
         11 . A semiconductor device comprising: 
 a nitrided field oxide region having a nitrided field oxide thickness;    a non-nitrided field oxide region having a non-nitrided field oxide thickness, the nitrided field oxide thickness being less than the non-nitrided field oxide thickness.    
     
     
         12 . The semiconductor device of    claim 11    wherein the nitrided field oxide region and the non-nitrided field oxide region result from a single field oxidation process.  
     
     
         13 . The semiconductor device of    claim 12    wherein the nitrided field oxide region has a nitrided oxide thickness of between about 1,000-3,000 Å and the non-nitrided field oxide region has a non-nitrided oxide thickness of between about 3,000-8,000 Å.  
     
     
         14 . The semiconductor device of    claim 12    wherein the non-nitrided oxide thickness is at least about 1.5 times the nitrided oxide thickness.  
     
     
         15 . The semiconductor device of    claim 12    wherein the non-nitrided oxide thickness is at least about 2 times the nitrided oxide thickness.  
     
     
         16 . The semiconductor device of    claim 12    wherein the non-nitrided oxide thickness is at least about 3 times the nitrided oxide thickness.  
     
     
         17 . The semiconductor device of    claim 12    wherein the non-nitrided oxide thickness is at least about 4.5 times the nitrided oxide thickness.  
     
     
         18 . The semiconductor device of    claim 12    wherein the non-nitrided oxide thickness is at least about 6 times the nitrided oxide thickness.  
     
     
         19 . The semiconductor device of    claim 11    wherein the semiconductor device is a multi-voltage semiconductor device designed to operate at a first voltage and a second voltage, the second voltage being greater than the first voltage.  
     
     
         20 . The semiconductor device of    claim 19    wherein the second voltage is at least about 1.5 times greater than the first voltage.  
     
     
         21 . The semiconductor device of    claim 19    wherein the second voltage is at least about 2 times greater than the first voltage.  
     
     
         22 . The semiconductor device of    claim 19    wherein the second voltage is at least about 3 times greater than the first voltage.  
     
     
         23 . The semiconductor device of    claim 19    wherein the second voltage is at least about 4.5 times greater than the first voltage.  
     
     
         24 . The semiconductor device of    claim 19    wherein the second voltage is at least about 6 times greater than the first voltage.  
     
     
         25 . The semiconductor device of    claim 19    wherein the semiconductor device is a flash memory device.  
     
     
         26 . The semiconductor device of    claim 19    further comprising a low-voltage cell and a high-voltage cell, the nitrided field oxide providing isolation to the low-voltage cell and the non-nitrided field oxide providing isolation to the high-voltage cell.  
     
     
         27 . The semiconductor device of    claim 19    wherein the second voltage is at least about twice the first voltage.  
     
     
         28 . The semiconductor device of    claim 11    wherein the non-nitrided field oxide thickness is at least about 20% greater than the nitrided field oxide thickness.  
     
     
         29 . A flash-memory semiconductor device comprising: 
 a low-voltage active cell configured to operate at a first voltage;    a high-voltage active cell configured to operate at a second voltage, the second voltage being at least about twice the first voltage;    a nitrided field oxide region adjoining the low-voltage active cell, the nitrided field oxide having a nitrided field oxide thickness;    a non-nitrided field oxide region adjoining the high-voltage active cell, the non-nitrided field oxide having a non-nitrided field oxide thickness, the non-nitrided field oxide thickness being at least about 20% thicker than the nitrided field oxide thickness.