Inventor · disambiguated record
Cedric Lichtenau
Also filed as: LICHTENAU CEDRIC · LICHTENAU CÉDRIC
111 granted patents·15 pending applications·181 citations·filing 2003–2024
99Inventor score
Top patents by PatentIndex Score
126 records- 0196US11360769B1Decimal scale and convert and split to hexadecimal floating point instructionIBM·Filed 2021·Granted Jun 14, 2022·5 cites·20 claims
- 0295US11269632B1Data conversion to/from selected data type with implied rounding modeIBM·Filed 2021·Granted Mar 8, 2022·7 cites·20 claims
- 0394US10169451B1Rapid character substring searchingIBM·Filed 2018·Granted Jan 1, 2019·22 cites·16 claims
- 0493US10437718B1Computerized methods for prefetching data based on machine learned sequences of memory addressesIBM·Filed 2018·Granted Oct 8, 2019·19 cites·20 claims
- 0591US10235135B2Normalization of a product on a datapathIBM·Filed 2017·Granted Mar 19, 2019·6 cites·14 claims
- 0686US10649781B2Enhanced performance-aware instruction schedulingIBM·Filed 2017·Granted May 12, 2020·4 cites·8 claims
- 0786US10324816B2Checking a computer processor design for soft error handlingIBM·Filed 2017·Granted Jun 18, 2019·5 cites·15 claims
- 0884US9110135B2Chip testing with exclusive ORIBM·Filed 2013·Granted Aug 18, 2015·4 cites·13 claims
- 0983US10296294B2Multiply-add operations of binary numbers in an arithmetic unitIBM·Filed 2018·Granted May 21, 2019·3 cites·1 claims
- 1082US10901745B2Method and apparatus for processing storage instructionsIBM·Filed 2018·Granted Jan 26, 2021·3 cites·19 claims
- 1182US10746794B2Logic built in self test circuitry for use in an integrated circuit with scan chainsIBM·Filed 2016·Granted Aug 18, 2020·2 cites·8 claims
- 1282US10649028B2Logic built in self test circuitry for use in an integrated circuit with scan chainsIBM·Filed 2016·Granted May 12, 2020·2 cites·6 claims
- 1382US10088524B2Logic built in self test circuitry for use in an integrated circuit with scan chainsIBM·Filed 2016·Granted Oct 2, 2018·2 cites·12 claims
- 1482US9923579B2Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitryIBM·Filed 2016·Granted Mar 20, 2018·2 cites·13 claims
- 1581US11663004B2Vector convert hexadecimal floating point to scaled decimal instructionIBM·Filed 2021·Granted May 30, 2023·1 cites·25 claims
- 1681US10303481B2Performance-aware instruction schedulingIBM·Filed 2015·Granted May 28, 2019·3 cites·7 claims
- 1781US9858229B2Data access protection for computer systemsIBM·Filed 2014·Granted Jan 2, 2018·6 cites·2 claims
- 1879US10459031B2Electronic circuit having serial latch scan chainsGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 29, 2019·5 cites·15 claims
- 1979US10018672B2Reducing power requirements and switching during logic built-in-self-test and scan testIBM·Filed 2017·Granted Jul 10, 2018·1 cites·10 claims
- 2078US11099853B2Digit validation check control in instruction executionIBM·Filed 2019·Granted Aug 24, 2021·2 cites·20 claims
- 2178US11023205B2Negative zero control in instruction executionIBM·Filed 2019·Granted Jun 1, 2021·2 cites·20 claims
- 2278US7602874B2Providing accurate time-based counters for scaling operating frequencies of microprocessorsIBM·Filed 2006·Granted Oct 13, 2009·8 cites·18 claims
- 2377US9292398B2Design-based weighting for logic built-in self-testIBM·Filed 2013·Granted Mar 22, 2016·4 cites·6 claims
- 2476US10732972B2Non-overlapping substring detection within a data element stringIBM·Filed 2018·Granted Aug 4, 2020·2 cites·20 claims
- 2576US7895426B2Secure power-on reset engineIBM·Filed 2007·Granted Feb 22, 2011·8 cites·20 claims
- 2674US7757137B2Method and apparatus for on-the-fly minimum power state transitionIBM·Filed 2007·Granted Jul 13, 2010·8 cites·7 claims
- 2772US9297856B2Implementing MISR compression methods for test time reductionIBM·Filed 2013·Granted Mar 29, 2016·2 cites·9 claims
- 2872US7996738B2Semiconductor chip with a plurality of scannable storage elements and a method for scanning storage elements on a semiconductor chipIBM·Filed 2008·Granted Aug 9, 2011·7 cites·20 claims
- 2971US10754773B2Selection of variable memory-access sizeIBM·Filed 2017·Granted Aug 25, 2020·1 cites·20 claims
- 3071US10372417B2Multiply-add operations of binary numbers in an arithmetic unitIBM·Filed 2017·Granted Aug 6, 2019·1 cites·13 claims
- 3170US9977680B2Clock-gating for multicycle instructionsIBM·Filed 2016·Granted May 22, 2018·1 cites·17 claims
- 3270US7949971B2Method and apparatus for on-the-fly minimum power state transitionIBM·Filed 2007·Granted May 24, 2011·6 cites·7 claims
- 3369US9959093B2Binary fused multiply-add floating-point calculationsIBM·Filed 2016·Granted May 1, 2018·1 cites·14 claims
- 3469US9658828B2Decimal and binary floating point roundingIBM·Filed 2015·Granted May 23, 2017·1 cites·12 claims
- 3568US10747819B2Rapid partial substring matchingIBM·Filed 2018·Granted Aug 18, 2020·1 cites·14 claims
- 3667US10896386B2Computerized branch predictions and decisionsIBM·Filed 2017·Granted Jan 19, 2021·1 cites·14 claims
- 3767US8471624B2Method for controlling the supply voltage for an integrated circuit and an apparatus with a voltage regulation module and an integrated circuitBONSELS STEFAN·Filed 2011·Granted Jun 25, 2013·4 cites·19 claims
- 3866US9151800B2Chip testing with exclusive ORIBM·Filed 2013·Granted Oct 6, 2015·1 cites·13 claims
- 3965US10649730B2Normalization of a product on a datapathIBM·Filed 2019·Granted May 12, 2020·0 cites·7 claims
- 4062US10739401B2Logic built in self test circuitry for use in an integrated circuit with scan chainsIBM·Filed 2018·Granted Aug 11, 2020·0 cites·12 claims
- 4162US10018671B2Reducing power requirements and switching during logic built-in-self-test and scan testIBM·Filed 2017·Granted Jul 10, 2018·0 cites·20 claims
- 4261US11663270B2Vector string search instructionIBM·Filed 2021·Granted May 30, 2023·0 cites·19 claims
- 4360US12236338B2Single function to perform combined matrix multiplication and bias add operationsIBM·Filed 2021·Granted Feb 25, 2025·0 cites·25 claims
- 4460US12190078B2Rounding hexadecimal floating point numbers using binary incrementorsIBM·Filed 2022·Granted Jan 7, 2025·0 cites·20 claims
- 4560US10379811B2Normalization of a product on a datapathIBM·Filed 2017·Granted Aug 13, 2019·0 cites·6 claims
- 4660US9929749B2Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitryIBM·Filed 2017·Granted Mar 27, 2018·0 cites·7 claims
- 4760US9915701B2Bypassing an encoded latch on a chip during a test-pattern scanIBM·Filed 2017·Granted Mar 13, 2018·0 cites·7 claims
- 4859US12399743B2Padding input data for artificial intelligence acceleratorsIBM·Filed 2022·Granted Aug 26, 2025·0 cites·24 claims
- 4959US10228910B2Overflow detection for sign-magnitude addersIBM·Filed 2018·Granted Mar 12, 2019·0 cites·18 claims
- 5059US10095475B2Decimal and binary floating point roundingIBM·Filed 2017·Granted Oct 9, 2018·0 cites·20 claims
Showing the top 50 of 126 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →