Inventor · disambiguated record
Joseph S. Newbury
Also filed as: NEWBURY JOSEPH S · NEWBURY JOSEPH SCOTT
8 granted patents·4 pending applications·315 citations·filing 2000–2013
87Inventor score
Top patents by PatentIndex Score
12 records- 0197US6444592B1Interfacial oxidation process for high-k gate dielectric process integrationIBM·Filed 2000·Granted Sep 3, 2002·191 cites·22 claims
- 0294US6503833B1Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed therebyIBM·Filed 2000·Granted Jan 7, 2003·83 cites·35 claims
- 0385US8383483B2High performance CMOS circuits, and methods for fabricating sameIBM·Filed 2009·Granted Feb 26, 2013·10 cites·15 claims
- 0481US6413859B1Method and structure for retarding high temperature agglomeration of silicides using alloysIBM·Filed 2000·Granted Jul 2, 2002·26 cites·3 claims
- 0568US8865556B2Using fast anneal to form uniform Ni(Pt)Si(Ge) contacts on SiGe layerNEWBURY JOSEPH S·Filed 2012·Granted Oct 21, 2014·3 cites·12 claims
- 0666US8236660B2Monolayer dopant embedded stressor for advanced CMOSCHAN KEVIN K·Filed 2010·Granted Aug 7, 2012·2 cites·5 claims
- 0751US8927431B2High-rate chemical vapor etch of silicon substratesIBM·Filed 2013·Granted Jan 6, 2015·0 cites·20 claims
- 0848US8421191B2Monolayer dopant embedded stressor for advanced CMOSCHAN KEVIN K·Filed 2012·Granted Apr 16, 2013·0 cites·14 claims
- 0945US2007152276A1High performance CMOS circuits, and methods for fabricating the sameIBM·Filed 2005·Application pending·0 cites
- 1041US2014057399A1Using Fast Anneal to Form Uniform Ni(Pt)Si(Ge) Contacts on SiGe LayerNEWBURY JOSEPH S·Filed 2012·Application pending·0 cites
- 1137US2002151158A1Method and structure for retarding high temperature agglomeration of silicides using alloysIBM·Filed 2002·Application pending·0 cites
- 1237US2003068883A1Self-aligned silicide (salicide) process for strained silicon MOSFET on SiGe and structure formed therebyIBM·Filed 2002·Application pending·0 cites
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