Inventor · disambiguated record
Yau-Kae Sheu
Also filed as: SHEU YAU-KAE
17 granted patents·2 pending applications·219 citations·filing 1994–2013
94Inventor score
Files withUNITED SEMICONDUCTOR CORP11UNITED MICROELECTRONICS CORP5HUANG CHI-CHENG1SHIH PING-CHIA1WANG CHIH MING1
Top patents by PatentIndex Score
19 records- 0184US8546226B2SONOS non-volatile memory cell and fabricating method thereofWANG CHIH-MING·Filed 2011·Granted Oct 1, 2013·8 cites·10 claims
- 0275US8815703B2Fabricating method of shallow trench isolation structureUNITED MICROELECTRONICS CORP·Filed 2013·Granted Aug 26, 2014·4 cites·6 claims
- 0373US8546871B2Non-volatile memory cell and fabricating method thereofHUANG CHI-CHENG·Filed 2011·Granted Oct 1, 2013·5 cites·7 claims
- 0469US5872036AMethod of manufacturing a split-gate flash memory cellUNITED SEMICONDUCTOR CORP·Filed 1997·Granted Feb 16, 1999·26 cites·4 claims
- 0568US5422292AProcess for fabricating split gate flash EEPROM memoryUNITED MICROELECTRONICS CORP·Filed 1994·Granted Jun 6, 1995·26 cites·6 claims
- 0665US6066572AMethod of removing carbon contamination on semiconductor substrateUNITED SEMICONDUCTOR CORP·Filed 1999·Granted May 23, 2000·29 cites·16 claims
- 0761US6051469AMethod of fabricating bit lineUNITED SEMICONDUCTOR CORP·Filed 1998·Granted Apr 18, 2000·18 cites·19 claims
- 0858US5915171AProcess of fabricating an antifuse structureUNITED SEMICONDUCTOR CORP·Filed 1997·Granted Jun 22, 1999·24 cites·11 claims
- 0956US5882972AMethod of fabricating a buried bit lineUNITED SEMICONDUCTOR CORP·Filed 1998·Granted Mar 16, 1999·17 cites·12 claims
- 1054US5646059AProcess for fabricating non-volatile memory cells having improved voltage coupling ratio by utilizing liquid phaseUNITED MICROELECTRONICS CORP·Filed 1995·Granted Jul 8, 1997·13 cites·10 claims
- 1152US6008522AStructure of buried bit lineUNITED SEMICONDUCTOR CORP·Filed 1998·Granted Dec 28, 1999·14 cites·6 claims
- 1252US5856224AMethod of fabricating split-gate flash memoryUNITED SEMICONDUCTOR CORP·Filed 1998·Granted Jan 5, 1999·12 cites·8 claims
- 1343US6180459B1Method for fabricating a flash memory with shallow trench isolationUNITED SEMICONDUCTOR CORP·Filed 1999·Granted Jan 30, 2001·7 cites·18 claims
- 1443US2013043513A1Shallow trench isolation structure and fabricating method thereofUNITED MICROELECTRONICS CORP·Filed 2011·Application pending·0 cites
- 1541US6242307B1Method of fabricating flash memoryUNITED MICROELECTRONICS CORP·Filed 1999·Granted Jun 5, 2001·6 cites·9 claims
- 1641US5907172ASplit-gate flash memory cell structureUNITED SEMICONDUCTOR CORP·Filed 1997·Granted May 25, 1999·6 cites·6 claims
- 1737US2012216155A1Checking method for mask design of integrated circuitSHIH PING-CHIA·Filed 2011·Application pending·0 cites
- 1833US6157057AFlash memory cellUNITED SEMICONDUCTOR CORP·Filed 1998·Granted Dec 5, 2000·2 cites·5 claims
- 1933US5994185AMethod of fabricating flash memory cellUNITED SEMICONDUCTOR CORP·Filed 1998·Granted Nov 30, 1999·2 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →