Inventor · disambiguated record
Deuk Sung Choi
Also filed as: CHOI DEUK SUNG
4 granted patents·2 pending applications·28 citations·filing 1997–2012
73Inventor score
Top patents by PatentIndex Score
6 records- 0157US7662684B2Method for reducing poly-depletion in dual gate CMOS fabrication processHYNIX SEMICONDUCTOR INC·Filed 2006·Granted Feb 16, 2010·1 cites·1 claims
- 0251US2010099228A1Method for reducing poly-depletion in dual gate cmos fabrication processHYNIX SEMICONDUCTOR INC·Filed 2009·Application pending·0 cites
- 0350US7067367B2Method for reducing poly-depletion due to thickness variation in a polysilicon layer in dual gate CMOS fabrication processHYNIX SEMICONDUCTOR INC·Filed 2003·Granted Jun 27, 2006·4 cites·2 claims
- 0450US6054357ASemiconductor device and method for fabricating the sameHYUNDAI ELECTRONICS IND·Filed 1997·Granted Apr 25, 2000·20 cites·6 claims
- 0547US2012322216A1Method for reducing poly-depletion in dual gate cmos fabrication processLEE CHANG YEOL·Filed 2012·Application pending·0 cites
- 0629US6146951AMethod of manufacturing semiconductor device for preventing electrostatic dischargeHYUNDAI ELECTRONICS IND·Filed 1998·Granted Nov 14, 2000·3 cites·10 claims
Join the waitlist — get patent alerts
Get an alert when Deuk Sung Choi files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →