Inventor · disambiguated record
Jarrod A. Roy
Also filed as: ROY JARROD A · ROY JARROD ALEXANDER
13 granted patents·2 pending applications·124 citations·filing 2009–2013
91Inventor score
Top patents by PatentIndex Score
15 records- 0196US8174826B2Liquid cooling system for stackable modules in energy-efficient computing systemsEL-ESSAWY WAEL R·Filed 2010·Granted May 8, 2012·33 cites·8 claims
- 0294US8780552B2Liquid cooling system for stackable modules in energy-efficient computing systemsEL-ESSAWY WAEL R·Filed 2012·Granted Jul 15, 2014·23 cites·8 claims
- 0392US8787015B2Liquid cooling system for stackable modules in energy-efficient computing systemsEL-ESSAWY WAEL R·Filed 2012·Granted Jul 22, 2014·15 cites·8 claims
- 0488US8782584B2Post-placement cell shiftingIBM·Filed 2013·Granted Jul 15, 2014·10 cites·1 claims
- 0585US8732468B2Protecting hardware circuit design by secret sharingROY JARROD A·Filed 2010·Granted May 20, 2014·16 cites·24 claims
- 0679US8495534B2Post-placement cell shiftingALPERT CHARLES J·Filed 2010·Granted Jul 23, 2013·5 cites·23 claims
- 0777US8347257B2Detailed routability by cell placementIBM·Filed 2010·Granted Jan 1, 2013·5 cites·24 claims
- 0874US8484594B2Routing-based pin placementKUCAR DOROTHY·Filed 2011·Granted Jul 9, 2013·7 cites·22 claims
- 0969US8108819B2Object placement in integrated circuit designALPERT CHARLES JAY·Filed 2009·Granted Jan 31, 2012·6 cites·20 claims
- 1062US8850163B2Automatically routing super-compute interconnectsEL-ESSAWY WAEL R·Filed 2012·Granted Sep 30, 2014·1 cites·6 claims
- 1158US8347249B2Incremental timing optimization and placementIBM·Filed 2009·Granted Jan 1, 2013·1 cites·25 claims
- 1253US8725483B2Minimizing the maximum required link capacity for three-dimensional interconnect routingEI-ESSAWY WAEL R·Filed 2011·Granted May 13, 2014·2 cites·19 claims
- 1346US8856495B2Automatically routing super-compute interconnectsEL-ESSAWY WAEL R·Filed 2011·Granted Oct 7, 2014·0 cites·18 claims
- 1441US2012297355A1Whitespace creation and preservation in circuit designALPERT CHARLES JAY·Filed 2011·Application pending·0 cites
- 1536US2010284539A1Methods for Protecting Against Piracy of Integrated CircuitsUNIV MICHIGAN·Filed 2010·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Jarrod A. Roy files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →