Inventor · disambiguated record
David A. Demuynck
Also filed as: DEMUYNCK DAVID · DEMUYNCK DAVID A
10 granted patents·2 pending applications·9 citations·filing 2005–2025
81Inventor score
Top patents by PatentIndex Score
12 records- 0176US7384878B2Method for applying a layer to a hydrophobic surfaceIBM·Filed 2005·Granted Jun 10, 2008·6 cites·32 claims
- 0270US12224344B2Method and system for control of sidewall orientation in vertical gallium nitride field effect transistorsSEMICONDUCTOR COMPONENTS IND LLC·Filed 2022·Granted Feb 11, 2025·0 cites·14 claims
- 0365US2025151319A1Method and system for control of sidewall orientation in vertical gallium nitride field effect transistorsSEMICONDUCTOR COMPONENTS IND LLC·Filed 2025·Application pending·0 cites
- 0462US9330988B1Method of fine-tuning process controls during integrated circuit chip manufacturing based on substrate backside roughnessIBM·Filed 2014·Granted May 3, 2016·1 cites·15 claims
- 0557US8181593B2Apparatus for applying a layer to a hydrophobic surfaceDEMUYNCK DAVID A·Filed 2008·Granted May 22, 2012·2 cites·14 claims
- 0654US8872289B2Micro-electro-mechanical system (MEMS) structures and design structuresIBM·Filed 2013·Granted Oct 28, 2014·0 cites·10 claims
- 0752US12381159B2Method and system for fabricating fiducials for processing of semiconductor devicesSEMICONDUCTOR COMPONENTS IND LLC·Filed 2023·Granted Aug 5, 2025·0 cites·13 claims
- 0847US9576863B2Method of fine-tuning process controls during integrated circuit chip manufacturing based on substrate backside roughnessIBM·Filed 2015·Granted Feb 21, 2017·0 cites·20 claims
- 0946US8673670B2Micro-electro-mechanical system (MEMS) structures and design structuresCZABAJ BRIAN M·Filed 2011·Granted Mar 18, 2014·0 cites·22 claims
- 1043US9390969B2Integrated circuit and interconnect, and method of fabricating sameGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 12, 2016·0 cites·18 claims
- 1141US9577023B2Metal wires of a stacked inductorGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 21, 2017·0 cites·14 claims
- 1236US2012086101A1Integrated circuit and interconnect, and method of fabricating sameDEMUYNCK DAVID A·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →