Inventor · disambiguated record
Lee James Jacobson
Also filed as: JACOBSON LEE · JACOBSON LEE J · JACOBSON LEE JAMES
10 granted patents·3 pending applications·70 citations·filing 2003–2013
87Inventor score
Top patents by PatentIndex Score
13 records- 0193US7447064B1System and method for providing a CMOS compatible single poly EEPROM with an NMOS program transistorNAT SEMICONDUCTOR CORP·Filed 2006·Granted Nov 4, 2008·31 cites·20 claims
- 0284US8004032B1System and method for providing low voltage high density multi-bit storage flash memoryNAT SEMICONDUCTOR CORP·Filed 2006·Granted Aug 23, 2011·10 cites·22 claims
- 0380US9338559B2Microphone system with a stop memberINVENSENSE INC·Filed 2013·Granted May 10, 2016·6 cites·21 claims
- 0462US7175777B1Method of forming a sub-micron tip featureNAT SEMICONDUCTOR CORP·Filed 2003·Granted Feb 13, 2007·7 cites·12 claims
- 0561US7858428B1Method for forming a lens using sub-micron horizontal tip featureNAT SEMICONDUCTOR CORP·Filed 2005·Granted Dec 28, 2010·2 cites·23 claims
- 0660US8241975B2System and method for providing low voltage high density multi-bit storage flash memoryBU JIANKANG·Filed 2011·Granted Aug 14, 2012·1 cites·18 claims
- 0760US2011115042A1Structure for decreasing minimum feature size in an integrated circuitLABONTE ANDRE PAUL·Filed 2011·Application pending·0 cites
- 0855US8343716B2Method of forming variable patterns using a reticleANALOG DEVICES INC·Filed 2008·Granted Jan 1, 2013·1 cites·20 claims
- 0953US2007052059A1Structure for decreasing minimum feature size in an integrated circuitLABONTE ANDRE P·Filed 2006·Application pending·0 cites
- 1052US7504340B1System and method for providing contact etch selectivity using RIE lag dependence on contact aspect ratioNAT SEMICONDUCTOR CORP·Filed 2004·Granted Mar 17, 2009·4 cites·16 claims
- 1152US7216270B1System and method for providing testing and failure analysis of integrated circuit memory devicesNAT SEMICONDUCTOR CORP·Filed 2004·Granted May 8, 2007·8 cites·39 claims
- 1239US2014037685A1Adjuvants that activate adaptive immune system by stimulating nlrp3EINSTEIN COLL MED·Filed 2013·Application pending·0 cites
- 1335US7484143B1System and method for providing testing and failure analysis of integrated circuit memory devicesNAT SEMICONDUCTOR CORP·Filed 2007·Granted Jan 27, 2009·0 cites·23 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →