Inventor · disambiguated record
Nicolas L. Breil
Also filed as: BREIL NICOLAS · BREIL NICOLAS L · BREIL NICOLAS LOUIS · BREIL NICOLAS LOUIS GABRIEL
46 granted patents·27 pending applications·111 citations·filing 2011–2025
97Inventor score
Top patents by PatentIndex Score
73 records- 0196US9449921B1Voidless contact metal structuresIBM·Filed 2015·Granted Sep 20, 2016·17 cites·7 claims
- 0295US10607841B2Silicide films through selective depositionAPPLIED MATERIALS INC·Filed 2018·Granted Mar 31, 2020·4 cites·20 claims
- 0393US9379012B2Oxide mediated epitaxial nickel disilicide alloy contact formationGLOBALFOUNDRIES INC·Filed 2016·Granted Jun 28, 2016·7 cites·18 claims
- 0492US9911849B2Transistor and method of forming sameIBM·Filed 2015·Granted Mar 6, 2018·8 cites·11 claims
- 0590US10068920B2Silicon germanium fins on insulator formed by lateral recrystallizationGLOBALFOUNDRIES INC·Filed 2016·Granted Sep 4, 2018·6 cites·15 claims
- 0689US9595524B2FinFET source-drain merged by silicide-based materialGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 14, 2017·9 cites·9 claims
- 0789US9543167B2FinFET source-drain merged by silicide-based materialGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 10, 2017·8 cites·14 claims
- 0888US9236345B2Oxide mediated epitaxial nickel disilicide alloy contact formationGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 12, 2016·6 cites·12 claims
- 0986US9379207B2Stable nickel silicide formation with fluorine incorporation and related IC structureGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 28, 2016·6 cites·17 claims
- 1085US9093425B1Self-aligned liner formed on metal semiconductor alloy contactsIBM·Filed 2014·Granted Jul 28, 2015·6 cites·9 claims
- 1184US10950450B2Silicide films through selective depositionAPPLIED MATERIALS INC·Filed 2020·Granted Mar 16, 2021·1 cites·20 claims
- 1284US9859403B1Multiple step thin film deposition method for high conformalityGLOBALFOUNDRIES INC·Filed 2016·Granted Jan 2, 2018·4 cites·19 claims
- 1384US9318336B2Non-volatile memory structure employing high-k gate dielectric and metal gateBREIL NICOLAS·Filed 2011·Granted Apr 19, 2016·6 cites·19 claims
- 1480US10922809B2Method for detecting voids and an inspection systemAPPLIED MATERIALS INC·Filed 2018·Granted Feb 16, 2021·2 cites·15 claims
- 1579US9166014B2Gate electrode with stabilized metal semiconductor alloy-semiconductor stackIBM·Filed 2013·Granted Oct 20, 2015·4 cites·13 claims
- 1678US9905692B2SOI FinFET fins with recessed fins and epitaxy in source drain regionGLOBALFOUNDRIES INC·Filed 2016·Granted Feb 27, 2018·2 cites·14 claims
- 1773US11978635B2Silicide films through selective depositionAPPLIED MATERIALS INC·Filed 2021·Granted May 7, 2024·0 cites·18 claims
- 1873US9093424B2Dual silicide integration with laser annealingIBM·Filed 2013·Granted Jul 28, 2015·2 cites·8 claims
- 1973US2025266295A1Void-free contact trench fill in gate-all-around fet archtectureAPPLIED MATERIALS INC·Filed 2025·Application pending·0 cites
- 2072US9373512B2Apparatus and method for laser heating and ion implantationGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 21, 2016·2 cites·19 claims
- 2171US10096609B2Modified tungsten siliconGLOBALFOUNDRIES INC·Filed 2015·Granted Oct 9, 2018·2 cites·18 claims
- 2270US9335759B2Optimization of a laser anneal beam path for maximizing chip yieldGLOBALFOUNDRIES INC·Filed 2014·Granted May 10, 2016·2 cites·20 claims
- 2370US2024105505A1Middle of line dielectric layer engineering for via void preventionAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 2470US2024105509A1Middle of line dielectric layer engineering for via void preventionAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 2569US9034749B2Gate electrode with stabilized metal semiconductor alloy-semiconductor stackIBM·Filed 2013·Granted May 19, 2015·2 cites·18 claims
- 2666US12327761B2Void-free contact trench fill in gate-all-around FET architectureAPPLIED MATERIALS INC·Filed 2022·Granted Jun 10, 2025·0 cites·13 claims
- 2765US9443772B2Diffusion-controlled semiconductor contact creationIBM·Filed 2014·Granted Sep 13, 2016·1 cites·18 claims
- 2865US9431534B2Asymmetric field effect transistor cap layerGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 30, 2016·1 cites·9 claims
- 2965US8552369B2Obtaining elemental concentration profile of sampleBREIL NICOLAS·Filed 2012·Granted Oct 8, 2013·2 cites·7 claims
- 3063US9449827B2Metal semiconductor alloy contact resistance improvementIBM·Filed 2014·Granted Sep 20, 2016·1 cites·20 claims
- 3162US2025081569A1Metal treatment on metal silicide for cmos devicesAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 3261US2025301763A1Ge contact layer integration for cmos devicesAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 3360US2025149381A1Gallium introduction for cavity shaping engineering for cmos devicesAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 3459US12509762B2Oxidation barriers with CVD soak processesAPPLIED MATERIALS INC·Filed 2023·Granted Dec 30, 2025·0 cites·20 claims
- 3559US12356705B2Electrical contact cavity structure and methods of forming the sameAPPLIED MATERIALS INC·Filed 2024·Granted Jul 8, 2025·0 cites·26 claims
- 3659US9299766B2DT capacitor with silicide outer electrode and/or compressive stress layer, and related methodsIBM·Filed 2014·Granted Mar 29, 2016·0 cites·11 claims
- 3759US2024332388A1Methods of reducing backside contact resistanceAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 3859US2025311380A1Sidewall doping for resistance reduction of gaa-like devicesAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 3958US2025359223A1Strain Elements in Metallic Source-Drain ArchitectureAPPLIED MATERIALS INC·Filed 2024·Application pending·0 cites
- 4058US2024203741A1Cavity shaping and selective metal silicide formation for cmos devicesAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 4158US2024128355A1Sacrificial source/drain for metallic source/drain horizontal gate all around architectureAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 4257US2024304671A1Methods For Forming Gate StructuresAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 4357US2024203742A1Contact layer formation with microwave annealing for nmos devicesAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 4457US2025212459A1Metallic source/drain with stress for advanced logic transistorsAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
- 4556US12284803B2System and methods for dram contact formationAPPLIED MATERIALS INC·Filed 2022·Granted Apr 22, 2025·0 cites·20 claims
- 4656US12113020B2Formation of metal vias on metal linesAPPLIED MATERIALS INC·Filed 2021·Granted Oct 8, 2024·0 cites·20 claims
- 4756US10707167B2Contacts to semiconductor substrate and methods of forming sameGLOBALFOUNDRIES INC·Filed 2017·Granted Jul 7, 2020·0 cites·6 claims
- 4856US9653535B2DT capacitor with silicide outer electrode and/or compressive stress layer, and related methodsIBM·Filed 2015·Granted May 16, 2017·0 cites·8 claims
- 4956US9099394B2Non-volatile memory structure employing high-k gate dielectric and metal gateIBM·Filed 2013·Granted Aug 4, 2015·0 cites·20 claims
- 5056US2024234209A1Contact resistance reduction by integration of molybdenum with titaniumAPPLIED MATERIALS INC·Filed 2023·Application pending·0 cites
Showing the top 50 of 73 patent records by PatentIndex Score.
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