Inventor · disambiguated record
Siripong Sritanyaratana
Also filed as: SRITANYARATANA SIRIPONG
11 granted patents·2 pending applications·401 citations·filing 1998–2009
92Inventor score
Files withINTEL CORP12
Top patents by PatentIndex Score
13 records- 0191US7523327B2System and method of coherent data transfer during processor idle statesINTEL CORP·Filed 2005·Granted Apr 21, 2009·19 cites·19 claims
- 0290US6971034B2Power/performance optimized memory controller considering processor power statesINTEL CORP·Filed 2003·Granted Nov 29, 2005·68 cites·20 claims
- 0390US6633987B2Method and apparatus to implement the ACPI(advanced configuration and power interface) C3 state in a RDRAM based systemINTEL CORP·Filed 2000·Granted Oct 14, 2003·75 cites·29 claims
- 0490US6452610B1Method and apparatus for displaying graphics based on frame selection indicatorsINTEL CORP·Filed 1998·Granted Sep 17, 2002·116 cites·16 claims
- 0578US7119803B2Method, apparatus and article for display unit power managementINTEL CORP·Filed 2002·Granted Oct 10, 2006·20 cites·9 claims
- 0673US7237131B2Transaction-based power management in a computer systemINTEL CORP·Filed 2003·Granted Jun 26, 2007·18 cites·24 claims
- 0771US6775785B1Method and apparatus for access to resources not mapped to an autonomous subsystem in a computer based system without involvement of the main operating systemINTEL CORP·Filed 2000·Granted Aug 10, 2004·19 cites·20 claims
- 0868US6490703B1Bus power savings using selective inversion in an ECC systemINTEL CORP·Filed 1999·Granted Dec 3, 2002·46 cites·23 claims
- 0964US6732288B2Bus power savings using selective inversion in an ECC systemINTEL CORP·Filed 2002·Granted May 4, 2004·9 cites·16 claims
- 1057US6735659B1Method and apparatus for serial communication with a co-processorINTEL CORP·Filed 2000·Granted May 11, 2004·9 cites·28 claims
- 1152US7346017B2Partially integrating wireless components of processor-based systemsINTEL CORP·Filed 2002·Granted Mar 18, 2008·2 cites·11 claims
- 1252US2009193274A1System And Method of Coherent Data Transfer During Processor Idle StatesINTEL CORP·Filed 2009·Application pending·0 cites
- 1339US2002124125A1Method and apparatus to permit a peripheral device to become the default system bus masterFiled 2000·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →