Inventor · disambiguated record
Gurgen Harutyunyan
Also filed as: HARUTYUNYAN GURGEN
12 granted patents·3 pending applications·17 citations·filing 2006–2023
85Inventor score
Files withSYNOPSYS INC9AMIRKHANYAN KAREN2ALCATEL LUCENT1ALCATEL LUCENT VIA THE ELECTRO1GRIGORYAN HAYK1
Top patents by PatentIndex Score
15 records- 0185US12094548B1Diagnosing faults in memory periphery circuitrySYNOPSYS INC·Filed 2023·Granted Sep 17, 2024·1 cites·20 claims
- 0279US11023310B1Detection of address errors in memory devices using multi-segment error detection codesSYNOPSYS INC·Filed 2019·Granted Jun 1, 2021·3 cites·20 claims
- 0373US10115477B2FinFET-based memory testing using multiple read operationsSYNOPSYS INC·Filed 2017·Granted Oct 30, 2018·3 cites·8 claims
- 0466US7683744B2Radio frequency waveguide comprising an electric conductor made of a plastic foil layer laminated with a electric conductive material layerALCATEL LUCENT·Filed 2006·Granted Mar 23, 2010·4 cites·20 claims
- 0564US8850277B2Detecting random telegraph noise induced failures in an electronic memoryAMIRKHANYAN KAREN·Filed 2011·Granted Sep 30, 2014·4 cites·33 claims
- 0660US9514258B2Generation of memory structural model based on memory layoutAMIRKHANYAN KAREN·Filed 2012·Granted Dec 6, 2016·2 cites·21 claims
- 0758US12002530B2Embedded memory transparent in-system built-in self-testSYNOPSYS INC·Filed 2022·Granted Jun 4, 2024·0 cites·20 claims
- 0847US12266413B2Built-in self-test circuit for row hammering in memorySYNOPSYS INC·Filed 2022·Granted Apr 1, 2025·0 cites·16 claims
- 0944US10192635B1FinFET-based memory testing using multiple read operationsSYNOPSYS INC·Filed 2018·Granted Jan 29, 2019·0 cites·20 claims
- 1044US9831000B2Testing electronic memories based on fault and test algorithm periodicitySYNOPSYS INC·Filed 2014·Granted Nov 28, 2017·0 cites·21 claims
- 1138US2013019130A1Testing electronic memories based on fault and test algorithm periodicitySYNOPSYS INC·Filed 2011·Application pending·0 cites
- 1237US2009178827A1Bi-material radio frequency transmission line and the associated manufacturing methodALCATEL LUCENT VIA THE ELECTRO·Filed 2008·Application pending·0 cites
- 1335US10789398B2Method and apparatus for SOC with optimal RSMASYNOPSYS INC·Filed 2017·Granted Sep 29, 2020·0 cites·4 claims
- 1434US9053050B2Determining a desirable number of segments for a multi-segment single error correcting coding schemeGRIGORYAN HAYK·Filed 2011·Granted Jun 9, 2015·0 cites·19 claims
- 1531US2013322827A1Connector with enclosure for electrical contacting means of the connectorREIMANN KARL-HEINZ·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →