Inventor · disambiguated record
Ohhan Kim
Also filed as: KIM OHHAN
33 granted patents·2 pending applications·204 citations·filing 2008–2024
97Inventor score
Top patents by PatentIndex Score
35 records- 0197US7906371B2Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shieldSTATS CHIPPAC LTD·Filed 2008·Granted Mar 15, 2011·64 cites·24 claims
- 0295US10388637B2Semiconductor device and method of forming a 3D interposer system-in-package moduleSTATS CHIPPAC PTE LTD·Filed 2017·Granted Aug 20, 2019·8 cites·24 claims
- 0395US8409979B2Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection propertiesCHOI DAESIK·Filed 2011·Granted Apr 2, 2013·17 cites·17 claims
- 0491US10797039B2Semiconductor device and method of forming a 3D interposer system-in-package moduleSTATS CHIPPAC PTE LTD·Filed 2018·Granted Oct 6, 2020·6 cites·21 claims
- 0591US8273604B2Semiconductor device and method of forming WLCSP structure using protruded MLPKIM OHHAN·Filed 2011·Granted Sep 25, 2012·17 cites·22 claims
- 0690US10700011B2Semiconductor device and method of forming an integrated SIP module with embedded inductor or packageSTATS CHIPPAC PTE LTD·Filed 2017·Granted Jun 30, 2020·7 cites·22 claims
- 0790US8519544B2Semiconductor device and method of forming WLCSP structure using protruded MLPKIM OHHAN·Filed 2012·Granted Aug 27, 2013·13 cites·25 claims
- 0888US8709935B2Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection propertiesSTATS CHIPPAC LTD·Filed 2013·Granted Apr 29, 2014·7 cites·21 claims
- 0987US9373578B2Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection propertiesSTATS CHIPPAC LTD·Filed 2014·Granted Jun 21, 2016·6 cites·26 claims
- 1086US10418341B2Semiconductor device and method of forming SIP with electrical component terminals extending out from encapsulantSTATS CHIPPAC PTE LTD·Filed 2017·Granted Sep 17, 2019·4 cites·25 claims
- 1185US10636756B2Semiconductor device and method of forming protrusion E-bar for 3D SIPSTATS CHIPPAC PTE LTD·Filed 2018·Granted Apr 28, 2020·4 cites·25 claims
- 1284US8519536B2Semiconductor device including bump formed on substrate to prevent extremely-low dielectric constant (ELK) interlayer dielectric layer (ILD) delamination during reflow processSTATS CHIPPAC LTD·Filed 2012·Granted Aug 27, 2013·5 cites·25 claims
- 1383US9478486B2Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with TSVSTATS CHIPPAC LTD·Filed 2014·Granted Oct 25, 2016·5 cites·20 claims
- 1483US8786076B2Semiconductor device and method of forming a thermally reinforced semiconductor dieKIM OHHAN·Filed 2011·Granted Jul 22, 2014·7 cites·19 claims
- 1583US8367467B2Semiconductor method of forming bump on substrate to prevent ELK ILD delamination during reflow processSTATS CHIPPAC LTD·Filed 2010·Granted Feb 5, 2013·5 cites·25 claims
- 1682US12385128B2Cooling device and process for cooling double-sided SiP devices during sputteringSTATS CHIPPAC PTE LTD·Filed 2024·Granted Aug 12, 2025·0 cites·24 claims
- 1780US8264059B2Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shieldKIM OHHAN·Filed 2011·Granted Sep 11, 2012·4 cites·18 claims
- 1879US9543258B2Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shieldSTATS CHIPPAC LTD·Filed 2016·Granted Jan 10, 2017·2 cites·25 claims
- 1978US8900921B2Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with TSVKIM SUN MI·Filed 2008·Granted Dec 2, 2014·7 cites·11 claims
- 2075US11932933B2Cooling device and process for cooling double-sided SiP devices during sputteringSTATS CHIPPAC PTE LTD·Filed 2022·Granted Mar 19, 2024·0 cites·23 claims
- 2175US9123663B2Semiconductor device and method of forming shielding layer grounded through metal pillars formed in peripheral region of the semiconductorKIM OHHAN·Filed 2008·Granted Sep 1, 2015·8 cites·24 claims
- 2273US10629565B2Semiconductor device and method of forming SIP with electrical component terminals extending out from encapsulantSTATS CHIPPAC PTE LTD·Filed 2019·Granted Apr 21, 2020·1 cites·22 claims
- 2372US10163744B2Semiconductor device and method of forming a low profile dual-purpose shield and heat-dissipation structureKIM OHHAN·Filed 2011·Granted Dec 25, 2018·3 cites·14 claims
- 2468US11434561B2Cooling device and process for cooling double-sided SiP devices during sputteringSTATS CHIPPAC PTE LTD·Filed 2020·Granted Sep 6, 2022·0 cites·24 claims
- 2567US10804119B2Method of forming SIP module over film layerSTATS CHIPPAC PTE LTD·Filed 2017·Granted Oct 13, 2020·1 cites·18 claims
- 2666US8884339B2Semiconductor device with bump formed on substrate to prevent ELK ILD delamination during reflow processSTATS CHIPPAC LTD·Filed 2013·Granted Nov 11, 2014·1 cites·29 claims
- 2765US11842991B2Semiconductor device and method of forming a 3D interposer system-in-package moduleSTATS CHIPPAC PTE LTD·Filed 2020·Granted Dec 12, 2023·0 cites·21 claims
- 2865US11367690B2Semiconductor device and method of forming an integrated SiP module with embedded inductor or packageSTATS CHIPPAC PTE LTD·Filed 2020·Granted Jun 21, 2022·0 cites·23 claims
- 2965US9293349B2Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shieldKIM OHHAN·Filed 2012·Granted Mar 22, 2016·1 cites·25 claims
- 3064US11309193B2Semiconductor device and method of forming SIP module over film layerSTATS CHIPPAC PTE LTD·Filed 2020·Granted Apr 19, 2022·0 cites·18 claims
- 3162US9279673B2Semiconductor device and method of calibrating warpage testing system to accurately measure semiconductor package warpageSTATS CHIPPAC LTD·Filed 2013·Granted Mar 8, 2016·1 cites·25 claims
- 3260US11342294B2Semiconductor device and method of forming protrusion e-bar for 3D SiPSTATS CHIPPAC PTE LTD·Filed 2020·Granted May 24, 2022·0 cites·22 claims
- 3349US8137995B2Double-sided semiconductor device and method of forming top-side and bottom-side interconnect structuresKIM OHHAN·Filed 2008·Granted Mar 20, 2012·0 cites·21 claims
- 3444US2012153452A1Double-Sided Semiconductor Device and Method of Forming Top-Side and Bottom-Side Interconnect StructuresKIM OHHAN·Filed 2012·Application pending·0 cites
- 3537US2013049188A1Semiconductor Device and Method of Forming TIM Within Recesses of MUF MaterialCHOI DAESIK·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →