Inventor · disambiguated record
Hartmut Buenning
Also filed as: BUENNING HARTMUT
12 granted patents·3 pending applications·54 citations·filing 2012–2017
88Inventor score
Top patents by PatentIndex Score
15 records- 0193US9847258B2Plasma dicing with blade saw patterned underside maskNXP BV·Filed 2015·Granted Dec 19, 2017·16 cites·14 claims
- 0288US8987057B2Encapsulated wafer-level chip scale (WLSCP) pedestal packagingNXP BV·Filed 2013·Granted Mar 24, 2015·8 cites·11 claims
- 0386US8809166B2High die strength semiconductor wafer processing method and systemNXP BV·Filed 2012·Granted Aug 19, 2014·9 cites·9 claims
- 0484US9601437B2Plasma etching and stealth dicing laser processNXP BV·Filed 2014·Granted Mar 21, 2017·7 cites·19 claims
- 0583US9196537B2Protection of a wafer-level chip scale package (WLCSP)NXP BV·Filed 2013·Granted Nov 24, 2015·6 cites·15 claims
- 0677US9245804B2Using a double-cut for mechanical protection of a wafer-level chip scale package (WLCSP)NXP BV·Filed 2013·Granted Jan 26, 2016·4 cites·9 claims
- 0769US8895363B2Die preparation for wafer-level chip scale package (WLCSP)NXP BV·Filed 2013·Granted Nov 25, 2014·3 cites·6 claims
- 0862US9812361B2Combination grinding after laser (GAL) and laser on-off function to increase die strengthNXP BV·Filed 2014·Granted Nov 7, 2017·1 cites·15 claims
- 0945US2015162306A1Encapsulated wafer-level chip scale (wlscp) pedestal packagingNXP BV·Filed 2015·Application pending·0 cites
- 1044US9349645B2Apparatus, device and method for wafer dicingNXP BV·Filed 2013·Granted May 24, 2016·0 cites·13 claims
- 1143US2016172243A1Wafer material removalNXP BV·Filed 2014·Application pending·0 cites
- 1242US2014110826A1Backside protection for a wafer-level chip scale package (wlcsp)NXP BV·Filed 2013·Application pending·0 cites
- 1340US10347534B2Variable stealth laser dicing processNXP BV·Filed 2017·Granted Jul 9, 2019·0 cites·16 claims
- 1439US10410922B2Semiconductor device with six-sided protected wallsNXP BV·Filed 2017·Granted Sep 10, 2019·0 cites·7 claims
- 1533US11011446B2Semiconductor device and method of making a semiconductor deviceNexperia BV·Filed 2016·Granted May 18, 2021·0 cites·6 claims
Join the waitlist — get patent alerts
Get an alert when Hartmut Buenning files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →