Encapsulated wafer-level chip scale (wlscp) pedestal packaging

Abstract

Consistent with an example embodiment, there is semiconductor device assembled to resist mechanical damage. The semiconductor device comprises an active circuit defined on a top surface, contact areas providing electrical connection to the active circuit. There is a pedestal structure upon which the active circuit is mounted on an opposite bottom surface; the pedestal structure has an area smaller than the area of the active device. An encapsulation, consisting of a molding compound, surrounds the sides and the underside of the active device and it surrounds the contact areas. The encapsulation provides a resilient surface protecting the active device from mechanical damage. A feature of the embodiment is that the contact areas may have solder bumps defined thereon.

1 - 12 . (canceled) 
     
     
         13 . A method for assembling wafer level chip scale processed (WLCSP) devices from a wafer substrate having a front-side surface upon which solder bumps are defined on active device die and an opposite back-side surface, the method comprising:
 applying a protection tape on the front-side surface;   sawing with a “V-shaped” blade of a first kerf, on the back-side surface of the wafer substrate, in areas corresponding to saw lanes of the active device die, to a depth of about 50% of the wafer substrate thickness;   continuing the sawing of the back-side surface with a blade of a second smaller kerf, so as to separate the active device die into singulated device die, wherein each of the singulated device die has an angled recessed profile with respect to the vertical faces of the device die;   remounting the singulated device die on their front-side surfaces onto a sawing tape;   die bonding the singulated device die onto a pedestal array, the pedestal array having a top-side surface with pre-defined landings for the back-side surface of each of the singulated device die, the pedestal array having a pitch larger than that of the device die; and   encapsulating each one of the singulated device die on the pedestal array, and the encapsulant enveloping the WLCSP devices and flowing under the angled recess of each WLCSP device.   
     
     
         14 . The method as recited in  claim 13 , further comprising, laser-marking an under-side surface of the pedestal array corresponding to device die locations. 
     
     
         15 . The method as recited in  claim 14 , further comprising, placing the pedestal strip having encapsulated device die onto a sawing tape and sawing the encapsulated device into separate product devices. 
     
     
         16 . The method as recited in  claim 13 , wherein the angled recessed profile is defined by:
 masking the front-side surface of the wafer substrate with a protective film;   preferentially etching the back-side surface of the wafer substrate in areas corresponding to the saw lanes of the active devices, to about 50% of substrate thickness, so as to create sloped etch profile; and   at the etched areas of the back-side surface of the wafer substrate, sawing with the blade of the second smaller kerf, so as to separate the active device die into singulated device die, wherein each of the singulated device die has an angled recess defined by the sloped etch profile with respect to the vertical faces of the device die.   
     
     
         17 . The method as recited in  claim 13 , wherein the pedestal array is selected from one of the following: metal, plastic, a layered composite of plastic on metal.