Inventor · disambiguated record
Steven Bentley
Also filed as: BENTLEY STEVEN · BENTLEY STEVEN J · BENTLEY STEVEN JOHN
81 granted patents·17 pending applications·1,541 citations·filing 2013–2024
99Inventor score
Top patents by PatentIndex Score
98 records- 0199US10510620B1Work function metal patterning for N-P space between active nanostructuresGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 17, 2019·126 cites·6 claims
- 0299US10256158B1Insulated epitaxial structures in nanosheet complementary field effect transistorsGLOBALFOUNDRIES INC·Filed 2017·Granted Apr 9, 2019·68 cites·20 claims
- 0399US9991352B1Methods of forming a nano-sheet transistor device with a thicker gate stack and the resulting deviceGLOBALFOUNDRIES INC·Filed 2017·Granted Jun 5, 2018·90 cites·20 claims
- 0499US9947804B1Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structureGLOBALFOUNDRIES INC·Filed 2017·Granted Apr 17, 2018·154 cites·14 claims
- 0599US9640636B1Methods of forming replacement gate structures and bottom and top source/drain regions on a vertical transistor deviceGLOBALFOUNDRIES INC·Filed 2016·Granted May 2, 2017·88 cites·24 claims
- 0699US9536793B1Self-aligned gate-first VFETs using a gate spacer recessGLOBALFOUNDRIES INC·Filed 2016·Granted Jan 3, 2017·74 cites·13 claims
- 0798US10236292B1Complementary FETs with wrap around contacts and methods of forming sameGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 19, 2019·33 cites·9 claims
- 0898US10192867B1Complementary FETs with wrap around contacts and method of forming sameGLOBALFOUNDRIES INC·Filed 2018·Granted Jan 29, 2019·134 cites·6 claims
- 0998US9972494B1Method and structure to control channel length in vertical FET deviceGLOBALFOUNDRIES INC·Filed 2016·Granted May 15, 2018·38 cites·15 claims
- 1098US9825032B1Metal layer routing level for vertical FET SRAM and logic cell scalingGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 21, 2017·41 cites·14 claims
- 1198US9805988B1Method of forming semiconductor structure including suspended semiconductor layer and resulting structureGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 31, 2017·25 cites·16 claims
- 1298US9799751B1Methods of forming a gate structure on a vertical transistor deviceGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 24, 2017·28 cites·30 claims
- 1398US9773708B1Devices and methods of forming VFET with self-aligned replacement metal gates aligned to top spacer post top source drain EPIGLOBALFOUNDRIES INC·Filed 2016·Granted Sep 26, 2017·75 cites·19 claims
- 1498US9530863B1Methods of forming vertical transistor devices with self-aligned replacement gate structuresGLOBALFOUNDRIES INC·Filed 2016·Granted Dec 27, 2016·68 cites·19 claims
- 1598US9530866B1Methods of forming vertical transistor devices with self-aligned top source/drain conductive contactsGLOBALFOUNDRIES INC·Filed 2016·Granted Dec 27, 2016·128 cites·16 claims
- 1698US9178036B1Methods of forming transistor devices with different threshold voltages and the resulting productsGLOBALFOUNDRIES INC·Filed 2014·Granted Nov 3, 2015·45 cites·29 claims
- 1798US8716156B1Methods of forming fins for a FinFET semiconductor device using a mandrel oxidation processGLOBALFOUNDRIES INC·Filed 2013·Granted May 6, 2014·60 cites·39 claims
- 1897US10217846B1Vertical field effect transistor formation with critical dimension controlGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 26, 2019·21 cites·11 claims
- 1997US9165837B1Method to form defect free replacement fins by H2 annealGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 20, 2015·35 cites·20 claims
- 2096US9966456B1Methods of forming gate electrodes on a vertical transistor deviceGLOBALFOUNDRIES INC·Filed 2016·Granted May 8, 2018·14 cites·20 claims
- 2196US9748335B1Method, apparatus and system for improved nanowire/nanosheet spacersGLOBALFOUNDRIES INC·Filed 2016·Granted Aug 29, 2017·18 cites·20 claims
- 2295US11201152B2Method, apparatus, and system for fin-over-nanosheet complementary field-effect-transistorGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 14, 2021·12 cites·5 claims
- 2395US10157794B1Integrated circuit structure with stepped epitaxial regionGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 18, 2018·13 cites·14 claims
- 2495US10141414B1Negative capacitance matching in gate electrode structuresGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 27, 2018·12 cites·18 claims
- 2594US10056377B2Metal layer routing level for vertical FET SRAM and logic cell scalingGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 21, 2018·9 cites·20 claims
- 2693US10236379B2Vertical FET with self-aligned source/drain regions and gate length based on channel epitaxial growth processGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 19, 2019·10 cites·20 claims
- 2792US10283621B2Method of forming vertical field effect transistors with self-aligned gates and gate extensions and the resulting structureGLOBALFOUNDRIES INC·Filed 2017·Granted May 7, 2019·8 cites·7 claims
- 2891US10141446B2Formation of bottom junction in vertical FET devicesGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 27, 2018·5 cites·13 claims
- 2991US9613817B1Method of enhancing surface doping concentration of source/drain regionsGLOBALFOUNDRIES INC·Filed 2016·Granted Apr 4, 2017·8 cites·12 claims
- 3091US9564486B2Self-aligned dual-height isolation for bulk FinFETIBM·Filed 2015·Granted Feb 7, 2017·7 cites·13 claims
- 3190US10418368B1Buried local interconnect in source/drain regionGLOBALFOUNDRIES INC·Filed 2018·Granted Sep 17, 2019·7 cites·20 claims
- 3289US10475904B2Methods of forming merged source/drain regions on integrated circuit productsGLOBALFOUNDRIES INC·Filed 2018·Granted Nov 12, 2019·5 cites·19 claims
- 3388US10249710B2Methods, apparatus, and system for improved nanowire/nanosheet spacersGLOBALFOUNDRIES INC·Filed 2017·Granted Apr 2, 2019·4 cites·14 claims
- 3488US9543215B2Punch-through-stop after partial fin etchGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 10, 2017·5 cites·15 claims
- 3587US10347745B2Methods of forming bottom and top source/drain regions on a vertical transistor deviceGLOBALFOUNDRIES INC·Filed 2016·Granted Jul 9, 2019·5 cites·17 claims
- 3687US10312154B2Method of forming vertical FinFET device having self-aligned contactsGLOBALFOUNDRIES INC·Filed 2017·Granted Jun 4, 2019·4 cites·16 claims
- 3787US9842933B1Formation of bottom junction in vertical FET devicesGLOBALFOUNDRIES INC·Filed 2016·Granted Dec 12, 2017·4 cites·14 claims
- 3886US9570588B2Methods of forming transistor structures including forming channel material after formation processes to prevent damage to the channel materialGLOBALFOUNDRIES INC·Filed 2015·Granted Feb 14, 2017·4 cites·19 claims
- 3986US9299775B2Methods for the production of integrated circuits comprising epitaxially grown replacement structuresGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 29, 2016·7 cites·19 claims
- 4085US9647086B2Early PTS with buffer for channel doping controlGLOBALFOUNDRIES INC·Filed 2015·Granted May 9, 2017·5 cites·20 claims
- 4185US9368591B2Transistors comprising doped region-gap-doped region structures and methods of fabricationGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 14, 2016·5 cites·8 claims
- 4285US8963259B2Device isolation in finFET CMOSGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 24, 2015·5 cites·3 claims
- 4381US11515397B2III-V compound semiconductor layer stacks with electrical isolation provided by a trap-rich layerGLOBALFOUNDRIES US INC·Filed 2020·Granted Nov 29, 2022·1 cites·20 claims
- 4481US9530869B2Methods of forming embedded source/drain regions on finFET devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Dec 27, 2016·3 cites·22 claims
- 4581US9293324B2Methods of forming semiconductor devices including an electrically-decoupled finGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 22, 2016·4 cites·16 claims
- 4680US10497798B2Vertical field effect transistor with self-aligned contactsGLOBALFOUNDRIES INC·Filed 2019·Granted Dec 3, 2019·2 cites·17 claims
- 4779US9368578B2Methods of forming substrates comprised of different semiconductor materials and the resulting deviceGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 14, 2016·5 cites·19 claims
- 4879US9324790B2Self-aligned dual-height isolation for bulk FinFETIBM·Filed 2013·Granted Apr 26, 2016·4 cites·12 claims
- 4979US9305846B2Device isolation in FinFET CMOSGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 5, 2016·2 cites·14 claims
- 5077US9406803B2FinFET device including a uniform silicon alloy finGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 2, 2016·2 cites·20 claims
Showing the top 50 of 98 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Steven Bentley files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →