Inventor · disambiguated record
Huahung Kao
Also filed as: KAO HUAHUNG
29 granted patents·4 pending applications·166 citations·filing 2005–2021
96Inventor score
Technology areasH10W
Files withMARVELL INT LTD11MARVELL WORLD TRADE LTD10KAO HUAHUNG3MARVELL ASIA PTE LTD3LIOU SHIANN-MING2
Top patents by PatentIndex Score
33 records- 0197US7535110B2Stack die packagesMARVELL WORLD TRADE LTD·Filed 2007·Granted May 19, 2009·63 cites·20 claims
- 0291US9209163B2Package-on-package structuresKAO HUAHUNG·Filed 2012·Granted Dec 8, 2015·13 cites·19 claims
- 0390US7586199B1Structures, architectures, systems, methods, algorithms and software for configuring and integrated circuit for multiple packaging typesMARVELL INT LTD·Filed 2006·Granted Sep 8, 2009·16 cites·31 claims
- 0489US9666571B2Package-on-package structuresMARVELL WORLD TRADE LTD·Filed 2015·Granted May 30, 2017·6 cites·17 claims
- 0587US11282762B2Heat sink design for flip chip ball grid arrayMARVELL ASIA PTE LTD·Filed 2020·Granted Mar 22, 2022·2 cites·22 claims
- 0686US10128171B1Leadframe with improved half-etch layout to reduce defects caused during singulationMARVELL INT LTD·Filed 2017·Granted Nov 13, 2018·5 cites·10 claims
- 0783US8030098B1Pre-formed conductive bumps on bonding padsMARVELL INT LTD·Filed 2008·Granted Oct 4, 2011·9 cites·16 claims
- 0882US8912664B1Leadless multi-chip module structureMARVELL INT LTD·Filed 2014·Granted Dec 16, 2014·4 cites·15 claims
- 0981US8358013B1Leadless multi-chip module structureMARVELL INT LTD·Filed 2008·Granted Jan 22, 2013·7 cites·13 claims
- 1081US8319353B1Pre-formed conductive bumps on bonding padsLIOU SHIANN-MING·Filed 2011·Granted Nov 27, 2012·5 cites·21 claims
- 1180US8860193B2Pad configurations for an electronic package assemblySUTARDJA SEHAT·Filed 2011·Granted Oct 14, 2014·4 cites·15 claims
- 1280US8686547B1Stack die structure for stress reduction and facilitation of electromagnetic shieldingKAO HUAHUNG·Filed 2011·Granted Apr 1, 2014·7 cites·20 claims
- 1378US7999395B1Pillar structure on bump padMARVELL INT LTD·Filed 2010·Granted Aug 16, 2011·4 cites·13 claims
- 1477US9355951B2Interconnect layouts for electronic assembliesKAO HUAHUNG·Filed 2010·Granted May 31, 2016·5 cites·3 claims
- 1574US7560309B1Drop-in heat sink and exposed die-back for molded flip die packageMARVELL INT LTD·Filed 2005·Granted Jul 14, 2009·6 cites·14 claims
- 1672US7825521B2Stack die packagesMARVELL WORLD TRADE LTD·Filed 2009·Granted Nov 2, 2010·4 cites·20 claims
- 1769US8673689B2Single layer BGA substrate processLIOU SHIANN-MING·Filed 2012·Granted Mar 18, 2014·2 cites·13 claims
- 1866US8405220B1Structures, architectures, systems, methods, algorithms and software for configuring an integrated circuit for multiple packaging typesLOEB WAYNE·Filed 2007·Granted Mar 26, 2013·4 cites·21 claims
- 1958US9331052B2Pad configurations for an electronic package assemblyMARVELL WORLD TRADE LTD·Filed 2014·Granted May 3, 2016·0 cites·20 claims
- 2055US8963342B1Structures, architectures, systems, methods, algorithms and software for configuring an integrated circuit for multiple packaging typesMARVELL INT LTD·Filed 2013·Granted Feb 24, 2015·0 cites·14 claims
- 2155US7956474B1Structures, architectures, systems, methods, algorithms and software for configuring an integrated circuit for multiple packaging typesMARVELL INT LTD·Filed 2009·Granted Jun 7, 2011·0 cites·18 claims
- 2254US9543236B2Pad configurations for an electronic package assemblyMARVELL WORLD TRADE LTD·Filed 2016·Granted Jan 10, 2017·0 cites·20 claims
- 2354US8669139B1Leadless multi-chip module structureMARVELL INT LTD·Filed 2013·Granted Mar 11, 2014·0 cites·16 claims
- 2453US11469295B1Decoupling capacitor integrated in system on chip (SOC) deviceMARVELL ASIA PTE LTD·Filed 2020·Granted Oct 11, 2022·0 cites·15 claims
- 2553US8940585B2Single layer BGA substrate processMARVELL WORLD TRADE LTD·Filed 2014·Granted Jan 27, 2015·0 cites·14 claims
- 2651US9524927B1Structures, architectures, systems, methods, algorithms and software for configuring an integrated circuit for multiple packaging typesMARVELL INT LTD·Filed 2013·Granted Dec 20, 2016·0 cites·20 claims
- 2748US12199003B2Packaging stacked substrates and an integrated circuit die using a lid and a stiffening structureMARVELL ASIA PTE LTD·Filed 2021·Granted Jan 14, 2025·0 cites·17 claims
- 2848US2016353585A1Method for forming a via structure using a double-side laser processMARVELL WORLD TRADE LTD·Filed 2016·Application pending·0 cites
- 2945US8455347B1Structures, architectures, systems, methods, algorithms and software for configuring an integrated circuit for multiple packaging typesLEISTIKO TYSON·Filed 2011·Granted Jun 4, 2013·0 cites·9 claims
- 3045US2015257281A1Method for forming a via structure using a double-side laser processMARVELL WORLD TRADE LTD·Filed 2015·Application pending·0 cites
- 3144US2014151880A1Package-on-package structuresMARVELL WORLD TRADE LTD·Filed 2014·Application pending·0 cites
- 3244US2014231993A1Package-on-package structuresMARVELL WORLD TRADE LTD·Filed 2014·Application pending·0 cites
- 3341US9123699B1Formation of package pins in semiconductor packagingLIU CHENGLIN·Filed 2011·Granted Sep 1, 2015·0 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →