Inventor · disambiguated record
Ofer Geva
Also filed as: GEVA OFER
12 granted patents·5 pending applications·6 citations·filing 2006–2022
82Inventor score
Top patents by PatentIndex Score
17 records- 0177US10831958B2Integrated circuit design with optimized timing constraint configurationIBM·Filed 2018·Granted Nov 10, 2020·3 cites·20 claims
- 0267US10572613B2Estimating timing convergence using assertion comparisonsIBM·Filed 2017·Granted Feb 25, 2020·1 cites·16 claims
- 0366US10657211B2Circuit generation based on zero wire load assertionsIBM·Filed 2018·Granted May 19, 2020·1 cites·20 claims
- 0464US10997737B2Method and system for aligning image data from a vehicle cameraGM GLOBAL TECH OPERATIONS LLC·Filed 2019·Granted May 4, 2021·1 cites·20 claims
- 0556US11797740B2Even apportionment based on positive timing slack thresholdIBM·Filed 2022·Granted Oct 24, 2023·0 cites·20 claims
- 0654US11775730B2Hierarchical large block synthesis (HLBS) fillingIBM·Filed 2021·Granted Oct 3, 2023·0 cites·20 claims
- 0751US10325045B2Estimating timing convergence using assertion comparisonsIBM·Filed 2017·Granted Jun 18, 2019·0 cites·6 claims
- 0850US11030367B2Out-of-context feedback hierarchical large block synthesis (HLBS) optimizationIBM·Filed 2019·Granted Jun 8, 2021·0 cites·20 claims
- 0949US12367331B2Approach to child block pinningIBM·Filed 2022·Granted Jul 22, 2025·0 cites·20 claims
- 1047US11296093B2Deep trench capacitor distributionIBM·Filed 2020·Granted Apr 5, 2022·0 cites·16 claims
- 1147US10568203B2Modifying a circuit designIBM·Filed 2017·Granted Feb 18, 2020·0 cites·17 claims
- 1246US2018359852A1Modifying a Circuit DesignIBM·Filed 2017·Application pending·0 cites
- 1345US2024086608A1Workload aware exerciser device placementIBM·Filed 2022·Application pending·0 cites
- 1444US2023244847A1New release process including consistency checkingIBM·Filed 2022·Application pending·0 cites
- 1541US2018047158A1Chest radiograph (cxr) image analysisUNIV RAMOT·Filed 2016·Application pending·0 cites
- 1640US2008127019A1Method and system for designing a memory registerIBM·Filed 2006·Application pending·0 cites
- 1739US10546092B2Modifying a circuit design based on pre-routed top level designIBM·Filed 2017·Granted Jan 28, 2020·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →